Add bit instruction

[fpgaboy.git] / diag.asm

diff --git a/diag.asm b/diag.asm
index 50cefe73b0dff3747ce10de9d9d98202859e9b01..e9a9f19a602d70f15445230fd9a960567194078f 100644 (file)
--- a/diag.asm
+++ b/diag.asm
@@ -50,59 +50,66 @@ main:
 signon:
        db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
 
+tiles:
+       db %01111100
+       db %11000110
+       db %11000110
+       db %11111110
+       db %11000110
+       db %11000110
+       db %11000110
+       db %00000000
+       
+       db %11111100
+       db %11000110
+       db %11000110
+       db %11111100
+       db %11000110
+       db %11000110
+       db %11111100
+       db %00000000
+
+       db %01111100
+       db %11000110
+       db %11000010
+       db %11000000
+       db %11000010
+       db %11000110
+       db %01111100
+       db %00000000
+
+       db %11111100
+       db %11000110
+       db %11000110
+       db %11000110
+       db %11000110
+       db %11000110
+       db %11111100
+       db %00000000
+
 putscreen:
        ; Wait for vblank
        call .vblwait
 
        ld hl, $8000    ; Copy two tiles.
-       ld a, $AA
-       ld [hli], a
-       ld [hli], a
-       ld a, $55
-       ld [hli], a
-       ld [hli], a
-       ld a, $AA
-       ld [hli], a
-       ld [hli], a
-       ld a, $55
-       ld [hli], a
-       ld [hli], a
-       ld a, $AA
-       ld [hli], a
-       ld [hli], a
-       ld a, $55
-       ld [hli], a
-       ld [hli], a
-       ld a, $AA
-       ld [hli], a
-       ld [hli], a
-       ld a, $55
+       ld de, tiles
+       ld c, $20
+.cloop:        ld a, [de]
+       inc de
        ld [hli], a
        ld [hli], a
+       dec c
        xor a
-       ld [hli], a
-       ld [hli], a
-       ld [hli], a
-       ld [hli], a
-       ld [hli], a
-       ld [hli], a
-       ld [hli], a
-       ld [hli], a
-       ld [hli], a
-       ld [hli], a
-       ld [hli], a
-       ld [hli], a
-       ld [hli], a
-       ld [hli], a
-       ld [hli], a
-       ld [hli], a
+       cp c
+       jr nz, .cloop
        
        ld hl, $9800
 .vloop:        call .vblwait
        ld c, $40
-.loop: ld a, $01
-       ld [hli], a
-       xor a
+       ld b, 0
+.loop: ld a, b
+       inc b
+       and $03
        ld [hli], a
        ld a, h
        cp $9C