Make it easy to see what's going wrong.

[fpgaboy.git] / LCDC.v

diff --git a/LCDC.v b/LCDC.v
index 9cebfd7d161712d690dd561749d1a48b0bdfe135..0e1b569cedce48b5428e95fa1e1fd6bbb2b5e4fd 100644 (file)
--- a/LCDC.v
+++ b/LCDC.v
@@ -148,14 +148,14 @@ module LCDC(
        wire [11:0] tileaddr_in = vraminuse ? tileaddr : addr[12:1];
        
        always @(negedge clk)
        wire [11:0] tileaddr_in = vraminuse ? tileaddr : addr[12:1];
        
        always @(negedge clk)

-               if ((vraminuse && ((posx == 1) || ((posx > 2) && (vxpos[2:0] == 3'b110)))) || decode_bgmap1) begin
+               if ((vraminuse && ((posx == 1) || (vxpos[2:0] == 3'b110))) || decode_bgmap1) begin

                        tileno <= bgmap1[bgmapaddr_in];
                        if (wr && decode_bgmap1 && ~vraminuse)
                                bgmap1[bgmapaddr_in] <= data;
                end
        
        always @(negedge clk)
                        tileno <= bgmap1[bgmapaddr_in];
                        if (wr && decode_bgmap1 && ~vraminuse)
                                bgmap1[bgmapaddr_in] <= data;
                end
        
        always @(negedge clk)

-               if ((vraminuse && ((posx == 2) || ((posx > 2) && (vxpos[2:0] == 3'b111)))) || decode_tiledata) begin
+               if ((vraminuse && ((posx == 2) || (vxpos[2:0] == 3'b111))) || decode_tiledata) begin

                        tilehigh <= tiledatahigh[tileaddr_in];
                        tilelow <= tiledatalow[tileaddr_in];
                        if (wr && addr[0] && decode_tiledata && ~vraminuse)
                        tilehigh <= tiledatahigh[tileaddr_in];
                        tilelow <= tiledatalow[tileaddr_in];
                        if (wr && addr[0] && decode_tiledata && ~vraminuse)