Move the core to core/

[fpgaboy.git] / core / insn_alu8.v

diff --git a/core/insn_alu8.v b/core/insn_alu8.v
new file mode 100644 (file)
index 0000000..2921b18
--- /dev/null
+++ b/core/insn_alu8.v
@@ -0,0 +1,101 @@
+`ifdef EXECUTE
+       `INSN_ALU8,`INSN_ALU8IMM: begin
+               if ((opcode[7:6] == 2'b11) && (cycle == 0)) begin       // alu8imm
+                       `EXEC_INC_PC
+                       `EXEC_READ(`_PC + 1)
+               end else if ((opcode[2:0] == `INSN_reg_dHL) && (cycle == 0))
+                       `EXEC_READ(`_HL)
+               else begin
+                       `EXEC_NEWCYCLE
+                       `EXEC_INC_PC
+                       case (opcode[2:0])
+                       `INSN_reg_A:    tmp <= `_A;
+                       `INSN_reg_B:    tmp <= `_B;
+                       `INSN_reg_C:    tmp <= `_C;
+                       `INSN_reg_D:    tmp <= `_D;
+                       `INSN_reg_E:    tmp <= `_E;
+                       `INSN_reg_H:    tmp <= `_H;
+                       `INSN_reg_L:    tmp <= `_L;
+                       `INSN_reg_dHL:  tmp <= rdata;
+                       endcase
+               end
+       end
+`endif
+
+`ifdef WRITEBACK
+       `INSN_ALU8,`INSN_ALU8IMM: begin
+               if (((opcode[2:0] == `INSN_reg_dHL) || (opcode[7:6] == 2'b11)) && (cycle == 0)) begin
+                       /* Sit on our asses. */
+               end else begin          /* Actually do the computation! */
+                       case (opcode[5:3])
+                       `INSN_alu_ADD: begin
+                               `_A <= `_A + tmp;
+                               `_F <=  { /* Z */ ((`_A + tmp) == 8'b0) ? 1'b1 : 1'b0,
+                                         /* N */ 1'b0,
+                                         /* H */ (({1'b0,`_A[3:0]} + {1'b0,tmp[3:0]}) >> 4 == 1) ? 1'b1 : 1'b0,
+                                         /* C */ (({1'b0,`_A} + {1'b0,tmp}) >> 8 == 1) ? 1'b1 : 1'b0,
+                                         `_F[3:0]
+                                       };
+                       end
+                       `INSN_alu_ADC: begin
+                               `_A <= `_A + tmp + {7'b0,`_F[4]};
+                               `_F <=  { /* Z */ ((`_A + tmp + {7'b0,`_F[4]}) == 8'b0) ? 1'b1 : 1'b0,
+                                         /* N */ 1'b0,
+                                         /* H */ (({1'b0,`_A[3:0]} + {1'b0,tmp[3:0]} + {4'b0,`_F[4]}) >> 4 == 1) ? 1'b1 : 1'b0,
+                                         /* C */ (({1'b0,`_A} + {1'b0,tmp} + {8'b0,`_F[4]}) >> 8 == 1) ? 1'b1 : 1'b0,
+                                         `_F[3:0]
+                                       };
+                       end
+                       `INSN_alu_SUB: begin
+                               `_A <= `_A - tmp;
+                               `_F <=  { /* Z */ (`_A == tmp) ? 1'b1 : 1'b0,
+                                         /* N */ 1'b1,
+                                         /* H */ (tmp[3:0] > `_A[3:0]) ? 1'b1 : 1'b0,
+                                         /* C */ (tmp > `_A) ? 1'b1 : 1'b0,
+                                         `_F[3:0]
+                                       };
+                       end
+                       `INSN_alu_SBC: begin
+                               `_A <= `_A - (tmp + {7'b0,`_F[4]});
+                               `_F <=  { /* Z */ ((`_A - (tmp + {7'b0,`_F[4]})) == 8'b0) ? 1'b1 : 1'b0,
+                                         /* N */ 1'b1,
+                                         /* H */ (({1'b0,tmp[3:0]} + {4'b0,`_F[4]}) > {1'b0,`_A[3:0]}) ? 1'b1 : 1'b0,
+                                         /* C */ (({1'b0,tmp} + {8'b0,`_F[4]}) > {1'b0,`_A[7:0]}) ? 1'b1 : 1'b0,
+                                         `_F[3:0]
+                                       };
+                       end
+                       `INSN_alu_AND: begin
+                               `_A <= `_A & tmp;
+                               `_F <=  { /* Z */ ((`_A & tmp) == 0) ? 1'b1 : 1'b0,
+                                         3'b010,
+                                         `_F[3:0]
+                                       };
+                       end
+                       `INSN_alu_OR: begin
+                               `_A <= `_A | tmp;
+                               `_F <=  { /* Z */ ((`_A | tmp) == 0) ? 1'b1 : 1'b0,
+                                         3'b000,
+                                         `_F[3:0]
+                                       };
+                       end
+                       `INSN_alu_XOR: begin
+                               `_A <= `_A ^ tmp;
+                               `_F <=  { /* Z */ ((`_A ^ tmp) == 0) ? 1'b1 : 1'b0,
+                                         3'b000,
+                                         `_F[3:0]
+                                       };
+                       end
+                       `INSN_alu_CP: begin
+                               `_F <=  { /* Z */ (`_A == tmp) ? 1'b1 : 1'b0,
+                                         /* N */ 1'b1,
+                                         /* H */ (tmp[3:0] > `_A[3:0]) ? 1'b1 : 1'b0,
+                                         /* C */ (tmp > `_A) ? 1'b1 : 1'b0,
+                                         `_F[3:0]
+                                       };
+                       end
+                       default:
+                               $stop;
+                       endcase
+               end
+       end
+`endif