- section "end",HOME[1024]
- nop
-
SECTION "a",HOME[$00]
-start: jp main
+start: ld a, $AA
+ ld [$FF51], a
+ jr start
section "vbl",HOME[$40]
jp vbl
section "tmro",HOME[$50]
jp tmro
+ SECTION "b",HOME[$100]
+boot: jr main ; $0100
+ nop ; $0102
+ nop ; $0103
+ ;Nintendo Logo ; $0104
+ DB $CE,$ED,$66,$66,$CC,$0D,$00,$0B,$03,$73,$00,$83,$00,$0C,$00,$0D
+ DB $00,$08,$11,$1F,$88,$89,$00,$0E,$DC,$CC,$6E,$E6,$DD,$DD,$D9,$99
+ DB $BB,$BB,$67,$63,$6E,$0E,$EC,$CC,$DD,$DC,$99,$9F,$BB,$B9,$33,$3E
+ ;$0134
+ DB $00,$E7,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
+ ;$0144
+ DB $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
+
main:
ld a, $FF
ld c, $51
ld hl, signon
call puts
+ ld a, $91
+ ld [$FF40], a
+
call putscreen
ei
signon:
db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
+tiles:
+ db %01111100
+ db %11000110
+ db %11000110
+ db %11111110
+ db %11000110
+ db %11000110
+ db %11000110
+ db %00000000
+
+ db %11111100
+ db %11000110
+ db %11000110
+ db %11111100
+ db %11000110
+ db %11000110
+ db %11111100
+ db %00000000
+
+ db %01111100
+ db %11000110
+ db %11000010
+ db %11000000
+ db %11000010
+ db %11000110
+ db %01111100
+ db %00000000
+
+ db %11111100
+ db %11000110
+ db %11000110
+ db %11000110
+ db %11000110
+ db %11000110
+ db %11111100
+ db %00000000
+
putscreen:
+ LD A,$fc ; $001d Setup BG palette
+ LD [$FF47],A ; $001f
+
; Wait for vblank
- ld c, $41
-.stat: ld a, [c]
- ld [$FF51], a
- and $03 ; mode
- cp $01 ; VBLANK
- jr nz, .stat
+ call .vblwait
ld hl, $8000 ; Copy two tiles.
- ld a, $AA
- ld [hli], a
- ld [hli], a
- ld a, $55
- ld [hli], a
- ld [hli], a
- ld a, $AA
- ld [hli], a
- ld [hli], a
- ld a, $55
- ld [hli], a
- ld [hli], a
- ld a, $AA
- ld [hli], a
- ld [hli], a
- ld a, $55
- ld [hli], a
- ld [hli], a
- ld a, $AA
- ld [hli], a
- ld [hli], a
- ld a, $55
+ ld de, tiles
+ ld c, $20
+.cloop: ld a, [de]
+ inc de
ld [hli], a
ld [hli], a
+ dec c
xor a
- ld [hli], a
- ld [hli], a
- ld [hli], a
- ld [hli], a
- ld [hli], a
- ld [hli], a
- ld [hli], a
- ld [hli], a
- ld [hli], a
- ld [hli], a
- ld [hli], a
- ld [hli], a
- ld [hli], a
- ld [hli], a
- ld [hli], a
- ld [hli], a
+ cp c
+ jr nz, .cloop
ld hl, $9800
-.loop: ld a, $01
- ld [hli], a
- xor a
+.vloop: call .vblwait
+ ld c, $40
+ ld b, 0
+.loop: ld a, b
+ inc b
+ and $03
ld [hli], a
ld a, h
cp $9C
- jp nz,.loop
+ ret z
+ dec c
+ xor a
+ cp c
+ jr nz,.loop
+ jr .vloop
+
+.vblwait:
+.stat1: ld a, [$FF41] ; STAT
+ and $03
+ cp $00
+ jp nz, .stat1
+.stat2: ld a, [$FF41]
+ and $03
+ cp $01
+ jr nz, .stat2
ret
vbl:
xor a
ld [$FF0F], a
- ld c, $42 ; SCY
- ld a, [c]
- inc a
- ld [c], a
+ ld a, [$FF51]
+ bit 7, a
+ jr z, .nothing
+
+ bit 0, a
+ call nz, .scyup
- ld c, $43 ; SCX
- ld a, [c]
- inc a
- ld [c], a
+ bit 1, a
+ call nz, .scydown
+
+ bit 2, a
+ call nz, .scxup
+
+ bit 3, a
+ call nz, .scxdown
+.nothing:
POP HL
POP DE
POP BC
RETI
+.scyup: ld hl, $FF42
+ inc [hl]
+ ret
+
+.scydown: ld hl, $FF42
+ dec [hl]
+ ret
+
+.scxup: ld hl, $FF43
+ inc [hl]
+ ret
+
+.scxdown: ld hl, $FF43
+ dec [hl]
+ ret
+
+
lcdc:
PUSH AF
PUSH BC
ld a,[c]
cp $0
jr z,.loop1
-.loop2:
- ld a,[c]
+
+.loop2: ld a,[c]
cp $0
jr nz,.loop2
ret
; Serial port manipulation functions.
putc:
- ld c, $50
+ ld c, $53
push af
.waitport:
ld a,[c]
- cp $00
+ and $01
jr nz,.waitport
pop af
- ld [c],a
+ ld [$FF52],a
ret
puts: