Fix the UART, and set it to 19k2 for more stable operation. Make the downloader a...

[fpgaboy.git] / Makefile

diff --git a/Makefile b/Makefile
index 3a508aeb5569d47d0600a05083c35a497c344856..fe10ee8dc601cccb873e37dc795d70f8663cd30b 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -10,15 +10,15 @@ VLOGS_ALL = $(VLOGS) insn_call-callcc.v insn_incdec16.v insn_jr-jrcc.v \
        insn_ldm8_a.v insn_ldm16_a.v insn_ldbcde_a.v insn_alu_ext.v \
        insn_bit.v insn_two_byte.v insn_incdec_reg8.v
 
-all: CoreTop_rom.svf CoreTop_diag.svf CoreTop_bootrom.svf CoreTop.twr
+all: CoreTop.svf CoreTop.twr
 
 sim: CoreTop_isim.exe
 
-CoreTop.ngc: CoreTop.xst CoreTop.prj $(VLOGS_ALL)
+CoreTop.ngc: CoreTop.xst CoreTop.prj $(VLOGS_ALL) fpgaboot.hex gbboot.hex
        xst -ifn CoreTop.xst -ofn CoreTop.syr
 
 CoreTop.ngd: CoreTop.ngc foo.bmm CoreTop.ucf
-       ngdbuild -dd _ngo -uc CoreTop.ucf -nt timestamp -bm "foo.bmm" -p xc3s500e-fg320-5 "CoreTop.ngc" CoreTop.ngd
+       ngdbuild -dd _ngo -uc CoreTop.ucf -nt timestamp -p xc3s500e-fg320-5 "CoreTop.ngc" CoreTop.ngd
 
 CoreTop_map.ncd: CoreTop.ngd
        map -p xc3s500e-fg320-5 -cm area -pr off -k 4 -c 100 -o CoreTop_map.ncd CoreTop.ngd CoreTop.pcf
@@ -63,10 +63,11 @@ parsim: CoreTop_isim_par.exe
 %.mem: %.bin mashrom
        ./mashrom < $< > $@
 
-CoreTop_%.bit: %.mem CoreTop.bit foo_bd.bmm
-       data2mem -bm foo_bd.bmm -bd $< -bt CoreTop.bit -o b $@
+fpgaboot.hex: fpgaboot.bin mashrom
+       ./mashrom 256 < $< > $@
 
-CoreTop_%.svf: CoreTop_%.bit impact.cmd
+
+CoreTop.svf: CoreTop.bit impact.cmd
        sed -e s/XXX/$(subst .bit,,$<)/ < impact.cmd > tmp.cmd
        impact -batch tmp.cmd