Start refactoring instructions.

[fpgaboy.git] / Makefile

diff --git a/Makefile b/Makefile
index bf5d69890e7fc7ec8ccbc160e5e425951baf0938..0a4f4119fd695a03c4515c0671b804dcdcb72ee0 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1,4 +1,24 @@
-all: CoreTop.svf
+VLOGS=Uart.v Timer.v Interrupt.v GBZ80Core.v CPUDCM.v 7seg.v System.v allinsns.v insn_ld_reg_imm8.v
+
+all: CoreTop.svf CoreTop.twr
+
+CoreTop.ngc: CoreTop.xst CoreTop.prj $(VLOGS) CoreTop.ucf
+       xst -ifn CoreTop.xst -ofn CoreTop.syr
+
+CoreTop.ngd: CoreTop.ngc foo.bmm
+       ngdbuild -dd _ngo  -nt timestamp -i -bm "foo.bmm" -p xc3s500e-fg320-5 "CoreTop.ngc" CoreTop.ngd
+
+CoreTop_map.ncd: CoreTop.ngd
+       map -p xc3s500e-fg320-5 -cm area -pr off -k 4 -c 100 -o CoreTop_map.ncd CoreTop.ngd CoreTop.pcf
+
+CoreTop.ncd: CoreTop_map.ncd
+       par -w -ol std -t 1 CoreTop_map.ncd CoreTop.ncd CoreTop.pcf
+
+CoreTop.twr: CoreTop_map.ncd
+       trce -e 3 -s 5 -xml CoreTop CoreTop.ncd -o CoreTop.twr CoreTop.pcf -ucf CoreTop.ucf
+
+CoreTop.bit: CoreTop.ut CoreTop.ncd
+       bitgen -f CoreTop.ut CoreTop.ncd

 
 CoreTop_rom.bit: rom.hex CoreTop.bit foo_bd.bmm
        data2mem -bm foo_bd.bmm -bd rom.mem -bt CoreTop.bit -o b CoreTop_rom.bit
 
 CoreTop_rom.bit: rom.hex CoreTop.bit foo_bd.bmm
        data2mem -bm foo_bd.bmm -bd rom.mem -bt CoreTop.bit -o b CoreTop_rom.bit