wire irq, tmrirq, lcdcirq, vblankirq;
wire [7:0] jaddr;
wire [1:0] state;
+ wire ack;
GBZ80Core core(
.clk(clk),
.bus1wr(wr[1]),
.bus1rd(rd[1]),
.irq(irq),
+ .irqack(ack),
.jaddr(jaddr),
.state(state));
.serial(1'b0),
.buttons(1'b0),
.master(irq),
+ .ack(ack),
.jaddr(jaddr));
Soundcore sound(