Timer works.

[fpgaboy.git] / rom.asm

diff --git a/rom.asm b/rom.asm
index aa070ff2c0f33633af42231b746e09b771c53e0a..5527ea889a0bd0a9e07c39024757aabc5a2be5ad 100644 (file)
--- a/rom.asm
+++ b/rom.asm
@@ -4,7 +4,7 @@ main:
        ld c, $51       ; Note that we are alive.
        ld a, $FF
        ld [c],a
-
+       
        ld sp, $DFFF
 
        ld hl, signon
@@ -104,13 +104,20 @@ waitsw:
        ld hl,waitswstr
        call puts
        
+       ld c, $07
+       ld a, $04       ;start timer, 4.096KHz
+       ld [c], a
+       
        ld c, $51
        ld a, $00
        ld [c],a
        
+.loop1:
+       push bc
+       call testa
+       pop bc
        ld c, $51
        ld b, $0
-.loop1:
        ld a,[c]
        cp b
        jr z,.loop1
@@ -121,7 +128,19 @@ waitsw:
        ret
 
 waitswstr:
-       db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset.",$0D,$0A,0
+       db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset. Expect A.",$0D,$0A,0
+
+testa:
+       ld c, $0F
+       ld a, [c]
+       ld b, $00
+       cp b
+       ret z
+       xor a
+       ld [c], a
+       ld a, $41
+       call putc
+       ret
 
 ; Core instruction basic acceptance tests.
 insntest:
@@ -167,6 +186,18 @@ insntest:
        jr .fail
        rst $00
 .jr:
+
+       ; Test inc16
+       ld d, $12
+       ld e, $FF
+       ld hl, .inc16fail
+       inc de
+       ld a, $13
+       cp d
+       jr nz, .fail
+       ld a, $00
+       cp e
+       jr nz, .fail
        
        ; Test CP.
        ld hl, .cpfail
@@ -211,16 +242,18 @@ insntest:
        db "CP",0
 .cplfail:
        db "CPL",0
+.inc16fail:
+       db "INC16",0
 .testfailed:
-       db "test failed.",$0D,$0A,0
+       db " test failed.",$0D,$0A,0
 .ok:
        db "OK!",$0D,$0A,0
 
 ; Serial port manipulation functions.
 putc:
-       push af
        ld b, 0
        ld c, $50
+       push af
 .waitport:
        ld a,[c]
        cp b
@@ -238,4 +271,3 @@ puts:
        jr puts
 .done:
        ret
-