Start refactoring instructions.

[fpgaboy.git] / insn_ld_reg_reg.v

diff --git a/insn_ld_reg_reg.v b/insn_ld_reg_reg.v
new file mode 100644 (file)
index 0000000..4b5081e
--- /dev/null
+++ b/insn_ld_reg_reg.v
@@ -0,0 +1,29 @@
+`ifdef EXECUTE
+       `INSN_LD_reg_reg: begin
+               `EXEC_INC_PC;
+               `EXEC_NEWCYCLE;
+               case (opcode[2:0])
+               `INSN_reg_A:    tmp <= registers[`REG_A];
+               `INSN_reg_B:    tmp <= registers[`REG_B];
+               `INSN_reg_C:    tmp <= registers[`REG_C];
+               `INSN_reg_D:    tmp <= registers[`REG_D];
+               `INSN_reg_E:    tmp <= registers[`REG_E];
+               `INSN_reg_H:    tmp <= registers[`REG_H];
+               `INSN_reg_L:    tmp <= registers[`REG_L];
+               endcase
+       end
+`endif
+
+`ifdef WRITEBACK
+       `INSN_LD_reg_reg: begin
+               case (opcode[5:3])
+               `INSN_reg_A:    registers[`REG_A] <= tmp;
+               `INSN_reg_B:    registers[`REG_B] <= tmp;
+               `INSN_reg_C:    registers[`REG_C] <= tmp;
+               `INSN_reg_D:    registers[`REG_D] <= tmp;
+               `INSN_reg_E:    registers[`REG_E] <= tmp;
+               `INSN_reg_H:    registers[`REG_H] <= tmp;
+               `INSN_reg_L:    registers[`REG_L] <= tmp;
+               endcase
+       end
+`endif