Start refactoring instructions.

[fpgaboy.git] / insn_ld_hl_reg.v

diff --git a/insn_ld_hl_reg.v b/insn_ld_hl_reg.v
new file mode 100644 (file)
index 0000000..0b98431
--- /dev/null
+++ b/insn_ld_hl_reg.v
@@ -0,0 +1,29 @@
+`ifdef EXECUTE
+       `INSN_LD_HL_reg: begin
+               case (cycle)
+               0:      begin
+                               case (opcode[2:0])
+                               `INSN_reg_A:    wdata <= registers[`REG_A];
+                               `INSN_reg_B:    wdata <= registers[`REG_B];
+                               `INSN_reg_C:    wdata <= registers[`REG_C];
+                               `INSN_reg_D:    wdata <= registers[`REG_D];
+                               `INSN_reg_E:    wdata <= registers[`REG_E];
+                               `INSN_reg_H:    wdata <= registers[`REG_H];
+                               `INSN_reg_L:    wdata <= registers[`REG_L];
+                               endcase
+                               address <= {registers[`REG_H], registers[`REG_L]};
+                               wr <= 1; rd <= 0;
+                       end
+               1:      begin
+                               `EXEC_INC_PC;
+                               `EXEC_NEWCYCLE;
+                       end
+               endcase
+       end
+`endif
+
+`ifdef WRITEBACK
+       `INSN_LD_HL_reg: begin
+               /* Nothing of interest here */
+       end
+`endif