`define INSN_LDH_AC 8'b111x0010 // Either LDH A,(C) or LDH (C),A
`define INSN_LDx_AHL 8'b001xx010 // LDD/LDI A,(HL) / (HL),A
`define INSN_ALU8 8'b10xxxxxx // 10 xxx yyy
+`define INSN_ALU8IMM 8'b11xxx110
`define INSN_NOP 8'b00000000
`define INSN_RST 8'b11xxx111
`define INSN_RET 8'b110x1001 // 1 = RETI, 0 = RET
output reg [15:0] busaddress, /* BUS_* is latched on STATE_FETCH. */
inout [7:0] busdata,
output reg buswr, output reg busrd,
- input irq, input [7:0] jaddr);
+ input irq, input [7:0] jaddr,
+ output reg [1:0] state);
- reg [1:0] state; /* State within this bus cycle (see STATE_*). */
+// reg [1:0] state; /* State within this bus cycle (see STATE_*). */
reg [2:0] cycle; /* Cycle for instructions. */
reg [7:0] registers[11:0];