Fix tileaddr bug. Make bus interface more explicit.

[fpgaboy.git] / Makefile

diff --git a/Makefile b/Makefile
index 9d944420b232a8496f6b7d0c9475fd88e3987c09..0aaf564fa1c874841d649f1bd29375cc4cb2a6e3 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -5,7 +5,7 @@ VLOGS = 7seg.v GBZ80Core.v insn_call-callcc.v insn_incdec16.v \
        insn_ld_sp_hl.v insn_pop_reg.v insn_rst.v System.v CPUDCM.v \
        insn_alu_a.v insn_halt.v insn_jp-jpcc.v insn_ld_hl_reg.v \
        insn_ld_reg_imm8.v insn_ldx_ahl.v insn_push_reg.v insn_vop_intr.v \
-       Timer.v LCDC.v insn_ldm_a.v
+       Timer.v LCDC.v insn_ldm8_a.v insn_ldm16_a.v Framebuffer.v
 
 all: CoreTop_rom.svf CoreTop_diag.svf CoreTop.twr
 
@@ -42,7 +42,7 @@ parsim: CoreTop_isim_par.exe
 %.o: %.asm
        rgbasm -o$@ $<
 
-%.bin: %.o rom.lnk
+%.bin: %.o
        echo "[Objects]" > tmp.lnk
        echo $< >> tmp.lnk
        echo "" >> tmp.lnk
@@ -51,7 +51,7 @@ parsim: CoreTop_isim_par.exe
        xlink tmp.lnk
        rm tmp.lnk
 
-%.mem: %.bin
+%.mem: %.bin mashrom
        ./mashrom < $< > $@
 
 CoreTop_%.bit: %.mem CoreTop.bit foo_bd.bmm