]> Joshua Wise's Git repositories - fpgaboy.git/blobdiff - CoreTop.prj
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[fpgaboy.git] / CoreTop.prj
index 657572c1b33723591cf75c8e96b8099410c721fb..3670ba37ba5a65ab261221f02f5c1d5a9b8b944a 100644 (file)
@@ -1,10 +1,17 @@
 verilog work "Uart.v"
 verilog work "Timer.v"
 verilog work "Interrupt.v"
 verilog work "Uart.v"
 verilog work "Timer.v"
 verilog work "Interrupt.v"
-verilog work "GBZ80Core.v"
+verilog work "core/GBZ80Core.v"
 verilog work "CPUDCM.v"
 verilog work "7seg.v"
 verilog work "System.v"
 verilog work "LCDC.v"
 verilog work "Framebuffer.v"
 verilog work "CPUDCM.v"
 verilog work "7seg.v"
 verilog work "System.v"
 verilog work "LCDC.v"
 verilog work "Framebuffer.v"
-verilog work "pixDCM.v"
\ No newline at end of file
+verilog work "pixDCM.v"
+verilog work "Sound1.v"
+verilog work "Sound2.v"
+verilog work "Soundcore.v"
+verilog work "Buttons.v"
+verilog work "PS2Button.v"
+verilog work "Ethernet.v"
+verilog work "ethDCM.v"
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