Finish splitting out functions.

[fpgaboy.git] / insn_call-callcc.v

diff --git a/insn_call-callcc.v b/insn_call-callcc.v
new file mode 100644 (file)
index 0000000..bb7c14a
--- /dev/null
+++ b/insn_call-callcc.v
@@ -0,0 +1,57 @@
+`ifdef EXECUTE
+       `INSN_CALL,`INSN_CALLCC: begin
+               case (cycle)
+               0:      begin
+                               `EXEC_INC_PC;
+                               `EXEC_NEXTADDR_PCINC;
+                               rd <= 1;
+                       end
+               1:      begin
+                               `EXEC_INC_PC;
+                               `EXEC_NEXTADDR_PCINC;
+                               rd <= 1;
+                       end
+               2:      begin
+                               `EXEC_INC_PC;
+                               if (!opcode[0]) // i.e., is callcc
+                                       /* We need to check the condition code to bail out. */
+                                       case (opcode[4:3])
+                                       `INSN_cc_NZ:    if (registers[`REG_F][7]) begin `EXEC_NEWCYCLE; end
+                                       `INSN_cc_Z:     if (~registers[`REG_F][7]) begin `EXEC_NEWCYCLE; end
+                                       `INSN_cc_NC:    if (registers[`REG_F][4]) begin `EXEC_NEWCYCLE; end
+                                       `INSN_cc_C:     if (~registers[`REG_F][4]) begin `EXEC_NEWCYCLE; end
+                                       endcase
+                       end
+               3:      begin
+                               address <= {registers[`REG_SPH],registers[`REG_SPL]} - 1;
+                               wdata <= registers[`REG_PCH];
+                               wr <= 1;
+                       end
+               4:      begin
+                               address <= {registers[`REG_SPH],registers[`REG_SPL]} - 2;
+                               wdata <= registers[`REG_PCL];
+                               wr <= 1;
+                       end
+               5:      begin
+                               `EXEC_NEWCYCLE; /* do NOT increment the PC */
+                       end
+               endcase
+       end
+`endif
+
+`ifdef WRITEBACK
+       `INSN_CALL,`INSN_CALLCC: begin
+               case (cycle)
+               0:      begin /* type F */ end
+               1:      tmp <= rdata;   // tmp contains newpcl
+               2:      tmp2 <= rdata;  // tmp2 contains newpch
+               3:      begin /* type F */ end
+               4:      registers[`REG_PCH] <= tmp2;
+               5: begin
+                               {registers[`REG_SPH],registers[`REG_SPL]} <=
+                                       {registers[`REG_SPH],registers[`REG_SPL]} - 2;
+                               registers[`REG_PCL] <= tmp;
+                       end
+               endcase
+       end
+`endif