Fix tileaddr bug. Make bus interface more explicit.

[fpgaboy.git] / diag.asm

diff --git a/diag.asm b/diag.asm
index 7f06de0ce42223f19f4dc2b67a74a5497592e8c8..5d44cef29f6ba6c9654ef0dada74bf8868e4ae68 100644 (file)
--- a/diag.asm
+++ b/diag.asm
@@ -51,16 +51,59 @@ signon:
        db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
 
 putscreen:
-       ld a, $FF               ; Copy two tiles.
-       ld hl, $8000
+       ; Wait for vblank
+       ld c, $41
+.stat: ld a, [c]
+       ld [$FF51], a
+       and $03         ; mode
+       cp $01          ; VBLANK
+       jr nz, .stat
+
+       ld hl, $8000    ; Copy two tiles.
+       ld a, $AA
+       ld [hli], a
+       ld [hli], a
+       ld a, $55
+       ld [hli], a
+       ld [hli], a
+       ld a, $AA
+       ld [hli], a
+       ld [hli], a
+       ld a, $55
+       ld [hli], a
+       ld [hli], a
+       ld a, $AA
+       ld [hli], a
+       ld [hli], a
+       ld a, $55
+       ld [hli], a
+       ld [hli], a
+       ld a, $AA
+       ld [hli], a
+       ld [hli], a
+       ld a, $55
        ld [hli], a
        ld [hli], a
        xor a
        ld [hli], a
        ld [hli], a
+       ld [hli], a
+       ld [hli], a
+       ld [hli], a
+       ld [hli], a
+       ld [hli], a
+       ld [hli], a
+       ld [hli], a
+       ld [hli], a
+       ld [hli], a
+       ld [hli], a
+       ld [hli], a
+       ld [hli], a
+       ld [hli], a
+       ld [hli], a
        
        ld hl, $9800
-.loop: ld a, $FF
+.loop: ld a, $01
        ld [hli], a
        xor a
        ld [hli], a
@@ -82,6 +125,11 @@ vbl:
        ld a, [c]
        inc a
        ld [c], a
+       
+       ld c, $43       ; SCX
+       ld a, [c]
+       inc a
+       ld [c], a
 
        POP HL
        POP DE