]> Joshua Wise's Git repositories - fpgaboy.git/blobdiff - Soundcore.v
Add cut 1 of a cellram module
[fpgaboy.git] / Soundcore.v
index 16d6067c490317e6609cf88168e7bb857556ff4e..626001ddd31b6050dec257a75372bb171a8baa35 100644 (file)
@@ -12,14 +12,21 @@ module Soundcore(
        output reg snd_data_r
        );
 
-       reg [7:0] nr50,nr51,nr52;
-       reg [3:0] pwmcnt;
-       reg [4:0] cntclk;
+       reg [7:0] nr50 = 8'h00, nr51 = 8'h00, nr52 = 8'hF0;
+       reg [3:0] pwmcnt = 4'b0000;
+       reg [4:0] cntclk = 5'b00000;
        reg [13:0] lenclk;
        wire [3:0] sndout1,sndout2,sndout3,sndout4;
-       wire [3:0] right_snd = nr51[0] ? sndout1 : 4'b0;
-       wire [3:0] left_snd = nr51[4] ? sndout1 : 4'b0;
-
+       wire [3:0] right_snd =
+               (nr51[0] ? sndout1 : 4'b0) +
+               (nr51[1] ? sndout2 : 4'b0) +
+               (nr51[2] ? sndout3 : 4'b0) +
+               (nr51[3] ? sndout4 : 4'b0);
+       wire [3:0] left_snd =
+               (nr51[4] ? sndout1 : 4'b0) +
+               (nr51[5] ? sndout2 : 4'b0) +
+               (nr51[6] ? sndout3 : 4'b0) +
+               (nr51[7] ? sndout4 : 4'b0);
        assign sndout3 = 0;
        assign sndout4 = 0;
 
@@ -29,12 +36,12 @@ module Soundcore(
                         addr == `ADDR_NR52 ? nr52 : 8'bzzzzzzzz
                      : 8'bzzzzzzzz;
 
-       always @ (negedge core_clk) begin
+       always @ (posedge core_clk) begin
                if(wr) begin
                        case(addr)
                        `ADDR_NR50: nr50 <= data;
                        `ADDR_NR51: nr51 <= data;
-                       `ADDR_NR52: nr52 <= {data[7],3'b1,data[3:0]};
+                       `ADDR_NR52: nr52 <= {data[7],7'b1111111};
                        endcase
                end
                cntclk <= cntclk + 1;
@@ -52,7 +59,7 @@ module Soundcore(
                .data(data),
                .cntclk(cntclk[4]),
                .lenclk(lenclk[13]),
-               .en(nr52[7] & nr52[0]),
+               .en(nr52[7]),
                .snd_data(sndout1)
        );
        
@@ -64,7 +71,7 @@ module Soundcore(
                .data(data),
                .cntclk(cntclk[4]),
                .lenclk(lenclk[13]),
-               .en(nr52[7] & nr52[0]),
+               .en(nr52[7]),
                .snd_data(sndout2)
        );
 
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