Merge branch 'master' of andrew:/afs/andrew/usr/czl/public/FPGABoy

[fpgaboy.git] / CoreTop.ucf

diff --git a/CoreTop.ucf b/CoreTop.ucf
index 2f73107578869ee988c75b0b0d79f78e2efe5586..5e374104b662cbcb2bbb10d81b8d3903b06cf629 100644 (file)
--- a/CoreTop.ucf
+++ b/CoreTop.ucf
@@ -1,5 +1,6 @@
 NET "xtal" LOC="B8";
 NET "serio"  LOC = "p9";
+NET "serin" LOC = "u6";
 
 NET "leds<0>"  LOC = "j14"  ;
 NET "leds<1>"  LOC = "j15"  ;
@@ -47,4 +48,63 @@ NET "g<2>" LOC = "p6";
 NET "g<1>" LOC = "p8";
 NET "g<0>" LOC = "n8";
 NET "b<1>" LOC = "u4";
-NET "b<0>" LOC = "u5";
\ No newline at end of file
+NET "b<0>" LOC = "u5";
+
+NET "soundl" LOC = "l15" | SLEW = "fast";
+NET "soundr" LOC = "k12" | SLEW = "fast";
+
+NET "cr_nADV" LOC="J4" | SLEW="fast";
+NET "cr_nCE" LOC="R6" | SLEW="fast";
+NET "cr_nOE" LOC="T2" | SLEW="fast";
+NET "cr_nWE" LOC="N7" | SLEW="fast";
+NET "cr_CRE" LOC="P7" | SLEW="fast";
+NET "cr_nLB" LOC="K5" | SLEW="fast";
+NET "cr_nUB" LOC="K4" | SLEW="fast";
+NET "cr_CLK" LOC="H5" | SLEW="fast";
+
+NET "cr_DQ<0>" LOC="L1" | SLEW="fast";
+NET "cr_DQ<1>" LOC="L4" | SLEW="fast";
+NET "cr_DQ<2>" LOC="L6" | SLEW="fast";
+NET "cr_DQ<3>" LOC="M4" | SLEW="fast";
+NET "cr_DQ<4>" LOC="N5" | SLEW="fast";
+NET "cr_DQ<5>" LOC="P1" | SLEW="fast";
+NET "cr_DQ<6>" LOC="P2" | SLEW="fast";
+NET "cr_DQ<7>" LOC="R2" | SLEW="fast";
+NET "cr_DQ<8>" LOC="L3" | SLEW="fast";
+NET "cr_DQ<9>" LOC="L5" | SLEW="fast";
+NET "cr_DQ<10>" LOC="M3" | SLEW="fast";
+NET "cr_DQ<11>" LOC="M6" | SLEW="fast";
+NET "cr_DQ<12>" LOC="L2" | SLEW="fast";
+NET "cr_DQ<13>" LOC="N4" | SLEW="fast";
+NET "cr_DQ<14>" LOC="R3" | SLEW="fast";
+NET "cr_DQ<15>" LOC="T1" | SLEW="fast";
+
+NET "cr_A<0>" LOC="J1" | SLEW="fast";
+NET "cr_A<1>" LOC="J2" | SLEW="fast";
+NET "cr_A<2>" LOC="H4" | SLEW="fast";
+NET "cr_A<3>" LOC="H1" | SLEW="fast";
+NET "cr_A<4>" LOC="H2" | SLEW="fast";
+NET "cr_A<5>" LOC="J5" | SLEW="fast";
+NET "cr_A<6>" LOC="H3" | SLEW="fast";
+NET "cr_A<7>" LOC="H6" | SLEW="fast";
+NET "cr_A<8>" LOC="F1" | SLEW="fast";
+NET "cr_A<9>" LOC="G3" | SLEW="fast";
+NET "cr_A<10>" LOC="G6" | SLEW="fast";
+NET "cr_A<11>" LOC="G5" | SLEW="fast";
+NET "cr_A<12>" LOC="G4" | SLEW="fast";
+NET "cr_A<13>" LOC="F2" | SLEW="fast";
+NET "cr_A<14>" LOC="E1" | SLEW="fast";
+NET "cr_A<15>" LOC="M5" | SLEW="fast";
+NET "cr_A<16>" LOC="E2" | SLEW="fast";
+NET "cr_A<17>" LOC="C2" | SLEW="fast";
+NET "cr_A<18>" LOC="C1" | SLEW="fast";
+NET "cr_A<19>" LOC="D2" | SLEW="fast";
+NET "cr_A<20>" LOC="K3" | SLEW="fast";
+NET "cr_A<21>" LOC="D1" | SLEW="fast";
+NET "cr_A<22>" LOC="K6" | SLEW="fast";
+
+NET "st_nCE" LOC="R5" | SLEW="fast";
+NET "st_nRST" LOC="T5" | SLEW="fast";
+
+NET "ps2c" LOC="R12" | CLOCK_DEDICATED_ROUTE = FALSE;
+NET "ps2d" LOC="P11";