Fix some sync issues? Maybe?

[fpgaboy.git] / System.v

diff --git a/System.v b/System.v
index 2bb0613f8d725402c459b097a462a75ee6cca45c..dbcfaa43f65daf5c8a8b8db69773a9a1e8624603 100644 (file)
--- a/System.v
+++ b/System.v
@@ -6,11 +6,11 @@ module ROM(
        input clk,
        input wr, rd);
 
-       reg [7:0] rom [2047:0];
+       reg [7:0] rom [1023:0];
        initial $readmemh("rom.hex", rom);
 
        wire decode = address[15:13] == 0;
-       wire [7:0] odata = rom[address[11:0]];
+       wire [7:0] odata = rom[address[10:0]];
        assign data = (rd && decode) ? odata : 8'bzzzzzzzz;
        //assign data = rd ? odata : 8'bzzzzzzzz;
 endmodule
@@ -21,7 +21,7 @@ module InternalRAM(
        input clk,
        input wr, rd);
        
-       // synthesis attribute ram_style of reg is block
+       // synthesis attribute ram_style of ram is block
        reg [7:0] ram [8191:0];
        
        wire decode = address[15:13] == 3'b110;
@@ -72,8 +72,10 @@ module CoreTop(
        output wire [2:0] r, g,
        output wire [1:0] b);
        
-       wire clk;       
-       CPUDCM dcm (.CLKIN_IN(xtal), .CLKFX_OUT(clk));
+       wire xtalb, clk, vgaclk;
+       IBUFG iclkbuf(.O(xtalb), .I(xtal));
+       CPUDCM dcm (.CLKIN_IN(xtalb), .CLKFX_OUT(clk));
+       pixDCM pixdcm (.CLKIN_IN(xtalb), .CLKFX_OUT(vgaclk));
        
        wire [15:0] addr;       
        wire [7:0] data;
@@ -100,6 +102,10 @@ module CoreTop(
                .wr(wr),
                .rd(rd));
        
+       wire lcdhs, lcdvs, lcdclk;
+       wire [2:0] lcdr, lcdg;
+       wire [1:0] lcdb;
+       
        LCDC lcdc(
                .addr(addr),
                .data(data),
@@ -108,6 +114,21 @@ module CoreTop(
                .rd(rd),
                .lcdcirq(lcdcirq),
                .vblankirq(vblankirq),
+               .lcdclk(lcdclk),
+               .lcdhs(lcdhs),
+               .lcdvs(lcdvs),
+               .lcdr(lcdr),
+               .lcdg(lcdg),
+               .lcdb(lcdb));
+       
+       Framebuffer fb(
+               .lcdclk(lcdclk),
+               .lcdhs(lcdhs),
+               .lcdvs(lcdvs),
+               .lcdr(lcdr),
+               .lcdg(lcdg),
+               .lcdb(lcdb),
+               .vgaclk(vgaclk),
                .vgahs(hs),
                .vgavs(vs),
                .vgar(r),