[fpgaboy.git] / core / insn_incdec_hl.v

`define INSN_INCDEC_HL          9'b00011010x

`ifdef EXECUTE
        `INSN_INCDEC_HL: begin
                case (cycle)
                0:      `EXEC_READ(`_HL)
                1:      begin
                                `EXEC_WRITE(`_HL, rdata + (opcode[0] ? 8'hFF : 8'h01))
                                tmp <= rdata + (opcode[0] ? 8'hFF : 8'h01);
                        end
                2:      begin
                                `EXEC_INC_PC
                                `EXEC_NEWCYCLE
                        end
                endcase
        end
`endif

`ifdef WRITEBACK
        `INSN_INCDEC_HL: begin
                if (cycle == 1)
                        `_F <= {
                                (tmp == 8'h00) ? 1'b1 : 1'b0,   /* Z */
                                opcode[0],       /* N */
                                (tmp[3:0] == (opcode[0] ? 4'hF : 4'h0)) ? 1'b1 : 1'b0,
                                `_F[4:0]
                        };
        end
`endif