[fpgaboy.git] / core / insn_add_hl.v

`define INSN_ADD_HL             9'b000xx1001

`ifdef EXECUTE
        `INSN_ADD_HL: begin
                case (cycle)
                0:      case (opcode[5:4])
                        `INSN_reg16_BC: {tmp,tmp2} <= `_BC;
                        `INSN_reg16_DE: {tmp,tmp2} <= `_DE;
                        `INSN_reg16_HL: {tmp,tmp2} <= `_HL;
                        `INSN_reg16_SP: {tmp,tmp2} <= `_SP;
                        endcase
                1:      begin
                                `EXEC_INC_PC
                                `EXEC_NEWCYCLE
                        end
                endcase
        end
`endif

`ifdef WRITEBACK
        `INSN_ADD_HL: begin
                case (cycle)
                1:      begin
                                `_F <=  { /* Z */ `_F[7],
                                          /* N */ 1'b0,
                                          /* H */ (({1'b0,`_H[3:0],`_L} + {1'b0,tmp[3:0],tmp2}) & 13'h1000) ? 1'b1 : 1'b0,
                                          /* C */ (({1'b0,`_HL} + {1'b0,tmp,tmp2}) & 17'h10000) ? 1'b1 : 1'b0,
                                          `_F[3:0]
                                        };
                                `_HL <= `_HL + {tmp, tmp2};
                        end
                endcase
        end
`endif