]> Joshua Wise's Git repositories - fpgaboy.git/blob - insn_ldm16_a.v
Fix some sync issues? Maybe?
[fpgaboy.git] / insn_ldm16_a.v
1 // If opcode[4], then ld A, x, else ld x, A
2 // If opcode[1], then ld 16m8, else ld 8m8
3
4 `ifdef EXECUTE
5         `INSN_LD16M_A: begin
6                 case (cycle)
7                 0:      begin
8                                 `EXEC_INC_PC
9                                 `EXEC_READ(`_PC + 16'h0001)
10                         end
11                 1:      begin
12                                 `EXEC_INC_PC                    // we only hit here if 16m8
13                                 `EXEC_READ(`_PC + 16'h0001)
14                         end
15                 2:      if (opcode[4])  // LD A,x
16                                 `EXEC_READ(({rdata, tmp}))
17                         else
18                                 `EXEC_WRITE(({rdata, tmp}), `_A)
19                 3:      begin
20                                 `EXEC_NEWCYCLE
21                                 `EXEC_INC_PC
22                         end
23                 endcase
24         end
25 `endif
26
27 `ifdef WRITEBACK
28         `INSN_LD16M_A: begin
29                 case (cycle)
30                 0:      begin end
31                 1:      tmp <= rdata;
32                 2:      begin end
33                 3:      if (opcode[4]) `_A <= rdata;
34                 endcase
35         end
36 `endif
37
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