Merge branch 'master' of lu@anyus.res.cmu.edu:/storage/fpga/FPGABoy
[fpgaboy.git] / core / insn_pop_reg.v
1 `define INSN_POP_reg            9'b011xx0001
2
3 `ifdef EXECUTE
4         `INSN_POP_reg: begin    /* POP is 12 cycles! */
5                 case (cycle)
6                 0:      `EXEC_READ(`_SP)
7                 1:      `EXEC_READ(`_SP + 1)
8                 2:      begin
9                                 `EXEC_NEWCYCLE
10                                 `EXEC_INC_PC
11                         end
12                 endcase
13         end
14 `endif
15
16 `ifdef WRITEBACK
17         `INSN_POP_reg: begin    /* POP is 12 cycles! */
18                 case (cycle)
19                 0:      begin end
20                 1:      begin
21                                 case (opcode[5:4])
22                                 `INSN_stack_AF: `_F <= rdata;
23                                 `INSN_stack_BC: `_C <= rdata;
24                                 `INSN_stack_DE: `_E <= rdata;
25                                 `INSN_stack_HL: `_L <= rdata;
26                                 endcase
27                         end
28                 2:      begin
29                                 case (opcode[5:4])
30                                 `INSN_stack_AF: `_A <= rdata;
31                                 `INSN_stack_BC: `_B <= rdata;
32                                 `INSN_stack_DE: `_D <= rdata;
33                                 `INSN_stack_HL: `_H <= rdata;
34                                 endcase
35                                 `_SP <= `_SP + 2;
36                         end
37                 endcase
38         end
39 `endif
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