Start refactoring instructions.
[fpgaboy.git] / insn_push_reg.v
1 `ifdef EXECUTE
2         `INSN_PUSH_reg: begin   /* PUSH is 16 cycles! */
3                 case (cycle)
4                 0:      begin
5                                 wr <= 1;
6                                 address <= {registers[`REG_SPH],registers[`REG_SPL]}-1;
7                                 case (opcode[5:4])
8                                 `INSN_stack_AF: wdata <= registers[`REG_A];
9                                 `INSN_stack_BC: wdata <= registers[`REG_B];
10                                 `INSN_stack_DE: wdata <= registers[`REG_D];
11                                 `INSN_stack_HL: wdata <= registers[`REG_H];
12                                 endcase
13                         end
14                 1:      begin
15                                 wr <= 1;
16                                 address <= {registers[`REG_SPH],registers[`REG_SPL]}-2;
17                                 case (opcode[5:4])
18                                 `INSN_stack_AF: wdata <= registers[`REG_F];
19                                 `INSN_stack_BC: wdata <= registers[`REG_C];
20                                 `INSN_stack_DE: wdata <= registers[`REG_E];
21                                 `INSN_stack_HL: wdata <= registers[`REG_L];
22                                 endcase
23                         end
24                 2:      begin /* Twiddle thumbs. */ end
25                 3:      begin
26                                 `EXEC_NEWCYCLE;
27                                 `EXEC_INC_PC;
28                         end
29                 endcase
30         end
31 `endif
32
33 `ifdef WRITEBACK
34         `INSN_PUSH_reg: begin   /* PUSH is 16 cycles! */
35                 case (cycle)
36                 0:      begin /* type F */ end
37                 1:      begin /* type F */ end
38                 2:      begin /* type F */ end
39                 3:      {registers[`REG_SPH],registers[`REG_SPL]} <=
40                                 {registers[`REG_SPH],registers[`REG_SPL]} - 2;
41                 endcase
42         end
43 `endif
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