Joshua Wise's Git repositories - fpgaboy.git/blame_incremental

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Commit	Line	Data
	1	SECTION "a",HOME
	2
	3	main:
	4	ld c, $51 ; Note that we are alive.
	5	ld a, $FF
	6	ld [c],a
	7
	8	ld sp, $DFF0
	9
	10	ld c, $07
	11	ld a, $04 ;start timer, 4.096KHz
	12	ld [c], a
	13
	14	ld hl, $DF81
	15	xor a
	16	ld [hli], a
	17	ld [hli], a
	18
	19	ld hl, signon
	20	call puts
	21
	22	ei
	23
	24	call memtest
	25
	26	call insntest
	27
	28	call waitsw
	29
	30	di
	31
	32	jr main
	33
	34	signon:
	35	db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
	36
	37	section "fuq",HOME[$100]
	38	irqhand:
	39	PUSH AF
	40	PUSH BC
	41	PUSH DE
	42	PUSH HL
	43
	44	xor a
	45	ld c, $0F ; ack the irq
	46	ld [c], a
	47
	48	ld hl, $DF82
	49	ld a, [hld]
	50	cp 0
	51	jr z, .noprint
	52	ld a, $41 ; print A
	53	call putc
	54	.noprint:
	55	inc [hl]
	56	ld a, [hl]
	57	ld c, $51
	58	ld [c], a
	59
	60	POP HL
	61	POP DE
	62	POP BC
	63	POP AF
	64	RETI
	65
	66	; Memory tester: writes h ^ l to all addresses from C000 to DF80.
	67	memtest:
	68	ld hl,memteststr
	69	call puts
	70
	71	ld hl, $C001 ; Write loop
	72	.wr:
	73	ld a,h
	74	xor l
	75	ld [hli],a
	76	ld a, h
	77	cp $DF
	78	jr nz, .wr
	79	ld a, l
	80	cp $80
	81	jr nz, .wr
	82
	83	ld hl, $C001 ; Read loop
	84	.rd:
	85	ld a,h
	86	xor l
	87	ld b,a
	88	ld a, [hli]
	89	cp b
	90	jr nz, .memfail
	91
	92	ld a, h
	93	cp $DF
	94	jr nz, .rd
	95	ld a, l
	96	cp $80
	97	jr nz, .rd
	98
	99	ld hl, testokstr ; Say we're OK
	100	call puts
	101	ret
	102	.memfail: ; Say we failed (sadface)
	103	; decrement hl the easy way
	104	ld a,[hld]
	105	push hl
	106	ld hl, failatstr
	107	call puts
	108	pop hl
	109	ld a, h
	110	call puthex
	111	ld a, l
	112	call puthex
	113	ld a, $0A
	114	call putc
	115	ld a, $0D
	116	call putc
	117	ret
	118	memteststr:
	119	db "Testing memory from $C000 to $DF80...",0
	120	testokstr:
	121	db " OK!",$0D,$0A,0
	122	failatstr:
	123	db " Test failed at $",0
	124
	125	puthex: ; Put two hex nibbles to the serial console.
	126	push af
	127	rra
	128	rra
	129	rra
	130	rra
	131	and $0F
	132	add $30
	133	call putc
	134	pop af
	135	and $0F
	136	add $30
	137	call putc
	138	ret
	139
	140	; Wait for switches to be flipped on and off again.
	141	waitsw:
	142	ld hl,waitswstr
	143	call puts
	144
	145	ld hl,$DF82
	146	ld a, 1
	147	ld [hl], a
	148
	149	ld c, $51
	150	xor a
	151	ld [c],a
	152
	153	.loop1:
	154	ld a,[c]
	155	cp $0
	156	jr z,.loop1
	157	.loop2:
	158	ld a,[c]
	159	cp $0
	160	jr nz,.loop2
	161	ret
	162
	163	waitswstr:
	164	db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset. Expect A.",$0D,$0A,0
	165
	166	; Core instruction basic acceptance tests.
	167	insntest:
	168	ld hl, .insnteststr
	169	call puts
	170
	171	; Test PUSH and POP.
	172	ld b, $12
	173	ld c, $34
	174	ld d, $56
	175	ld e, $78
	176	push bc
	177	pop de
	178	ld hl, .pushpopfail
	179	ld a, d
	180	cp b
	181	jr nz,.fail
	182	ld a, e
	183	cp c
	184	jr nz,.fail
	185
	186	; Test ALU (HL).
	187	ld hl, .ff
	188	ld a, $FF
	189	xor [hl]
	190	ld hl, .xorhlfail
	191	jr nz, .fail
	192
	193	; Test JP (HL)
	194	ld hl, .jphl
	195	jp [hl]
	196	ld hl, .jphlfail
	197	jr .fail
	198	rst $00
	199	.jphl:
	200
	201	; Test JR
	202	ld a, $FF
	203	cp $0
	204	jr nz,.jr
	205	ld hl, .jrfail
	206	jr .fail
	207	rst $00
	208	.jr:
	209
	210	; Test inc16
	211	ld d, $12
	212	ld e, $FF
	213	ld hl, .inc16fail
	214	inc de
	215	ld a, $13
	216	cp d
	217	jr nz, .fail
	218	ld a, $00
	219	cp e
	220	jr nz, .fail
	221
	222	; Test CP.
	223	ld hl, .cpfail
	224	ld a, $10
	225	cp $20
	226	jr nc,.fail
	227	ld a, $20
	228	cp $10
	229	jr c,.fail
	230
	231	; Test CPL
	232	ld hl, .cplfail
	233	ld a, $55
	234	cpl
	235	cp $AA
	236	jr nz,.fail
	237
	238	; Test DI/EI delay
	239	di
	240	ld hl, .difail
	241	ld c, $0F ; First, wait until an interrupt happens...
	242	.wait: ld a, [c]
	243	cp 0
	244	jr z, .wait
	245	ei ; Now make sure that an IRQ didn't happen on EI/DI
	246	di
	247	ld a, [c]
	248	cp 0
	249	jr z, .fail
	250	ei ; Make sure that an IRQ does happen on EI/NOP/DI
	251	nop
	252	di
	253	ld a, [c]
	254	cp 0
	255	jr nz, .fail
	256	ei
	257
	258	ld hl, .ok
	259	call puts
	260	ret
	261	.fail:
	262	ei
	263	call puts
	264	ld hl, .testfailed
	265	call puts
	266	ret
	267	.insnteststr:
	268	db "Testing instructions... ",0
	269	.pushpopfail:
	270	db "PUSH/POP",0
	271	.ff:
	272	db $FF
	273	.xorhlfail:
	274	db "XOR [HL]",0
	275	.jphlfail:
	276	db "JP [HL]",0
	277	.jrfail:
	278	db "JR",0
	279	.cpfail:
	280	db "CP",0
	281	.cplfail:
	282	db "CPL",0
	283	.inc16fail:
	284	db "INC16",0
	285	.difail:
	286	db "DI/EI delay",0
	287	.testfailed:
	288	db " test failed.",$0D,$0A,0
	289	.ok:
	290	db "OK!",$0D,$0A,0
	291
	292	; Serial port manipulation functions.
	293	putc:
	294	ld c, $50
	295	push af
	296	.waitport:
	297	ld a,[c]
	298	cp $00
	299	jr nz,.waitport
	300	pop af
	301	ld [c],a
	302	ret
	303
	304	puts:
	305	ld a, [hli]
	306	cp $00
	307	ret z
	308	call putc
	309	jr puts