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Cut 1 at interrupt support for CPU
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1 SECTION "a",HOME
2
3main:
4 ld c, $51 ; Note that we are alive.
5 ld a, $FF
6 ld [c],a
7
8 ld sp, $DFFF
9
10 ld hl, signon
11 call puts
12
13 call memtest
14
15 call insntest
16
17 call waitsw
18
19 jr main
20
21signon:
22 db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
23
24; Memory tester: writes h ^ l to all addresses from C000 to DF80.
25memtest:
26 ld hl,memteststr
27 call puts
28
29 ld hl, $C000 ; Write loop
30.wr:
31 ld a,h
32 xor l
33 ld [hli],a
34 ld a, $DF
35 cp h
36 jr nz, .wr
37 ld a, $80
38 cp l
39 jr nz, .wr
40
41 ld hl, $C000 ; Read loop
42.rd:
43 ld a,h
44 xor l
45 ld b,a
46 ld a, [hli]
47 cp b
48 jr nz, .memfail
49
50 ld a, $DF
51 cp h
52 jr nz, .rd
53 ld a, $80
54 cp l
55 jr nz, .rd
56
57 ld hl, testokstr ; Say we're OK
58 call puts
59 ret
60.memfail: ; Say we failed (sadface)
61 ; decrement hl the easy way
62 ld a,[hld]
63 push hl
64 ld hl, failatstr
65 call puts
66 pop hl
67 ld a, h
68 call puthex
69 ld a, l
70 call puthex
71 ld a, $0A
72 call putc
73 ld a, $0D
74 call putc
75 ret
76memteststr:
77 db "Testing memory from $C000 to $DF80...",0
78testokstr:
79 db " OK!",$0D,$0A,0
80failatstr:
81 db " Test failed at $",0
82
83puthex: ; Put two hex nibbles to the serial console.
84 push af
85 rra
86 rra
87 rra
88 rra
89 ld b,$0F
90 and b
91 ld b,$30
92 add b
93 call putc
94 pop af
95 ld b,$0F
96 and b
97 ld b,$30
98 add b
99 call putc
100 ret
101
102; Wait for switches to be flipped on and off again.
103waitsw:
104 ld hl,waitswstr
105 call puts
106
107 ld c, $07
108 ld a, $04 ;start timer, 4.096KHz
109 ld [c], a
110
111 ld c, $51
112 ld a, $00
113 ld [c],a
114
115 ld e, a
116
117.loop1:
118 push bc
119 call testa
120 pop bc
121 ld c, $51
122 ld b, $0
123 ld a,[c]
124 cp b
125 jr z,.loop1
126.loop2:
127 ld a,[c]
128 cp b
129 jr nz,.loop2
130 ret
131
132waitswstr:
133 db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset. Expect A.",$0D,$0A,0
134
135testa:
136 ld c, $0F
137 ld a, [c]
138 ld b, $00
139 cp b
140 ret z
141 xor a
142 ld [c], a
143 ld a, $41
144 call putc
145 ld a, 1
146 add e
147 ld c, $51
148 ld [c], a
149 ld e, a
150 ret
151
152; Core instruction basic acceptance tests.
153insntest:
154 ld hl, .insnteststr
155 call puts
156
157 ; Test PUSH and POP.
158 ld b, $12
159 ld c, $34
160 ld d, $56
161 ld e, $78
162 push bc
163 pop de
164 ld hl, .pushpopfail
165 ld a, d
166 cp b
167 jr nz,.fail
168 ld a, e
169 cp c
170 jr nz,.fail
171
172 ; Test ALU (HL).
173 ld hl, .ff
174 ld a, $FF
175 xor [hl]
176 ld hl, .xorhlfail
177 jr nz, .fail
178
179 ; Test JP (HL)
180 ld hl, .jphl
181 jp [hl]
182 ld hl, .jphlfail
183 jr .fail
184 rst $00
185.jphl:
186
187 ; Test JR
188 ld a, $FF
189 ld b, $00
190 cp b
191 jr nz,.jr
192 ld hl, .jrfail
193 jr .fail
194 rst $00
195.jr:
196
197 ; Test inc16
198 ld d, $12
199 ld e, $FF
200 ld hl, .inc16fail
201 inc de
202 ld a, $13
203 cp d
204 jr nz, .fail
205 ld a, $00
206 cp e
207 jr nz, .fail
208
209 ; Test CP.
210 ld hl, .cpfail
211 ld a, $10
212 ld b, $20
213 cp b
214 jr nc,.fail
215 ld a, $20
216 ld b, $10
217 cp b
218 jr c,.fail
219
220 ; Test CPL
221 ld hl, .cplfail
222 ld a, $55
223 ld b, $AA
224 cpl
225 cp b
226 jr nz,.fail
227
228 ld hl, .ok
229 call puts
230 ret
231.fail:
232 call puts
233 ld hl, .testfailed
234 call puts
235 ret
236.insnteststr:
237 db "Testing instructions... ",0
238.pushpopfail:
239 db "PUSH/POP",0
240.ff:
241 db $FF
242.xorhlfail:
243 db "XOR [HL]",0
244.jphlfail:
245 db "JP [HL]",0
246.jrfail:
247 db "JR",0
248.cpfail:
249 db "CP",0
250.cplfail:
251 db "CPL",0
252.inc16fail:
253 db "INC16",0
254.testfailed:
255 db " test failed.",$0D,$0A,0
256.ok:
257 db "OK!",$0D,$0A,0
258
259; Serial port manipulation functions.
260putc:
261 ld b, 0
262 ld c, $50
263 push af
264.waitport:
265 ld a,[c]
266 cp b
267 jr nz,.waitport
268 pop af
269 ld [c],a
270 ret
271
272puts:
273 ld a, [hli]
274 ld b, $00
275 cp b
276 jr z, .done
277 call putc
278 jr puts
279.done:
280 ret
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