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1 SECTION "a",HOME
2
3main:
4 ld c, $51 ; Note that we are alive.
5 ld a, $FF
6 ld [c],a
7
8 ld sp, $DFF0
9
10 ld c, $07
11 ld a, $04 ;start timer, 4.096KHz
12 ld [c], a
13
14 ld hl, $DF81
15 xor a
16 ld [hli], a
17 ld [hli], a
18
19 ld hl, signon
20 call puts
21
22 ei
23
24 call memtest
25
26 call insntest
27
28 call waitsw
29
30 di
31
32 jr main
33
34signon:
35 db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
36
37 section "fuq",HOME[$100]
38irqhand:
39 PUSH AF
40 PUSH BC
41 PUSH DE
42 PUSH HL
43
44 xor a
45 ld c, $0F ; ack the irq
46 ld [c], a
47
48 ld hl, $DF82
49 ld a, [hld]
50 cp 0
51 jr z, .noprint
52 ld a, $41 ; print A
53 call putc
54.noprint:
55 ld a, [hl]
56 add 1
57 ld c, $51
58 ld [c], a
59 ld [hl], a
60
61 POP HL
62 POP DE
63 POP BC
64 POP AF
65 RETI
66
67; Memory tester: writes h ^ l to all addresses from C000 to DF80.
68memtest:
69 ld hl,memteststr
70 call puts
71
72 ld hl, $C001 ; Write loop
73.wr:
74 ld a,h
75 xor l
76 ld [hli],a
77 ld a, h
78 cp $DF
79 jr nz, .wr
80 ld a, l
81 cp $80
82 jr nz, .wr
83
84 ld hl, $C001 ; Read loop
85.rd:
86 ld a,h
87 xor l
88 ld b,a
89 ld a, [hli]
90 cp b
91 jr nz, .memfail
92
93 ld a, h
94 cp $DF
95 jr nz, .rd
96 ld a, l
97 cp $80
98 jr nz, .rd
99
100 ld hl, testokstr ; Say we're OK
101 call puts
102 ret
103.memfail: ; Say we failed (sadface)
104 ; decrement hl the easy way
105 ld a,[hld]
106 push hl
107 ld hl, failatstr
108 call puts
109 pop hl
110 ld a, h
111 call puthex
112 ld a, l
113 call puthex
114 ld a, $0A
115 call putc
116 ld a, $0D
117 call putc
118 ret
119memteststr:
120 db "Testing memory from $C000 to $DF80...",0
121testokstr:
122 db " OK!",$0D,$0A,0
123failatstr:
124 db " Test failed at $",0
125
126puthex: ; Put two hex nibbles to the serial console.
127 push af
128 rra
129 rra
130 rra
131 rra
132 and $0F
133 add $30
134 call putc
135 pop af
136 and $0F
137 add $30
138 call putc
139 ret
140
141; Wait for switches to be flipped on and off again.
142waitsw:
143 ld hl,waitswstr
144 call puts
145
146 ld hl,$DF82
147 ld a, 1
148 ld [hl], a
149
150 ld c, $51
151 xor a
152 ld [c],a
153
154.loop1:
155 ld a,[c]
156 cp $0
157 jr z,.loop1
158.loop2:
159 ld a,[c]
160 cp $0
161 jr nz,.loop2
162 ret
163
164waitswstr:
165 db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset. Expect A.",$0D,$0A,0
166
167; Core instruction basic acceptance tests.
168insntest:
169 ld hl, .insnteststr
170 call puts
171
172 ; Test PUSH and POP.
173 ld b, $12
174 ld c, $34
175 ld d, $56
176 ld e, $78
177 push bc
178 pop de
179 ld hl, .pushpopfail
180 ld a, d
181 cp b
182 jr nz,.fail
183 ld a, e
184 cp c
185 jr nz,.fail
186
187 ; Test ALU (HL).
188 ld hl, .ff
189 ld a, $FF
190 xor [hl]
191 ld hl, .xorhlfail
192 jr nz, .fail
193
194 ; Test JP (HL)
195 ld hl, .jphl
196 jp [hl]
197 ld hl, .jphlfail
198 jr .fail
199 rst $00
200.jphl:
201
202 ; Test JR
203 ld a, $FF
204 cp $0
205 jr nz,.jr
206 ld hl, .jrfail
207 jr .fail
208 rst $00
209.jr:
210
211 ; Test inc16
212 ld d, $12
213 ld e, $FF
214 ld hl, .inc16fail
215 inc de
216 ld a, $13
217 cp d
218 jr nz, .fail
219 ld a, $00
220 cp e
221 jr nz, .fail
222
223 ; Test CP.
224 ld hl, .cpfail
225 ld a, $10
226 cp $20
227 jr nc,.fail
228 ld a, $20
229 cp $10
230 jr c,.fail
231
232 ; Test CPL
233 ld hl, .cplfail
234 ld a, $55
235 cpl
236 cp $AA
237 jr nz,.fail
238
239 ld hl, .ok
240 call puts
241 ret
242.fail:
243 call puts
244 ld hl, .testfailed
245 call puts
246 ret
247.insnteststr:
248 db "Testing instructions... ",0
249.pushpopfail:
250 db "PUSH/POP",0
251.ff:
252 db $FF
253.xorhlfail:
254 db "XOR [HL]",0
255.jphlfail:
256 db "JP [HL]",0
257.jrfail:
258 db "JR",0
259.cpfail:
260 db "CP",0
261.cplfail:
262 db "CPL",0
263.inc16fail:
264 db "INC16",0
265.testfailed:
266 db " test failed.",$0D,$0A,0
267.ok:
268 db "OK!",$0D,$0A,0
269
270; Serial port manipulation functions.
271putc:
272 ld c, $50
273 push af
274.waitport:
275 ld a,[c]
276 cp $00
277 jr nz,.waitport
278 pop af
279 ld [c],a
280 ret
281
282puts:
283 ld a, [hli]
284 cp $00
285 ret z
286 call putc
287 jr puts
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