| 1 | `ifdef EXECUTE |
| 2 | `INSN_VOP_INTR: begin |
| 3 | case (cycle) |
| 4 | 0: begin |
| 5 | address <= {registers[`REG_SPH],registers[`REG_SPL]} - 1; |
| 6 | wdata <= registers[`REG_PCH]; |
| 7 | wr <= 1; |
| 8 | end |
| 9 | 1: begin |
| 10 | address <= {registers[`REG_SPH],registers[`REG_SPL]} - 2; |
| 11 | wdata <= registers[`REG_PCL]; |
| 12 | wr <= 1; |
| 13 | end |
| 14 | 2: begin |
| 15 | `EXEC_NEWCYCLE; |
| 16 | end |
| 17 | endcase |
| 18 | end |
| 19 | `endif |
| 20 | |
| 21 | `ifdef WRITEBACK |
| 22 | `INSN_VOP_INTR: begin |
| 23 | case (cycle) |
| 24 | 0: begin end |
| 25 | 1: begin end |
| 26 | 2: begin |
| 27 | ie <= 0; |
| 28 | {registers[`REG_PCH],registers[`REG_PCL]} <= |
| 29 | {8'b0,jaddr}; |
| 30 | {registers[`REG_SPH],registers[`REG_SPL]} <= |
| 31 | {registers[`REG_SPH],registers[`REG_SPL]} - 2; |
| 32 | end |
| 33 | endcase |
| 34 | end |
| 35 | `endif |