]> Joshua Wise's Git repositories - fpgaboy.git/blame_incremental - rom.asm
Add JP HL, add CALL CC
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CommitLineData
1 SECTION "a",HOME
2
3main:
4 ld c, $51 ; Note that we are alive.
5 ld a, $FF
6 ld [c],a
7
8 ld sp, $DFFF
9
10 ld hl, signon
11 call puts
12
13 call memtest
14
15 call insntest
16
17 call waitsw
18
19 jp main
20
21signon:
22 db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
23
24; Memory tester: writes h ^ l to all addresses from C000 to DF80.
25memtest:
26 ld hl,memteststr
27 call puts
28
29 ld hl, $C000 ; Write loop
30.wr:
31 ld a,h
32 xor l
33 ld [hli],a
34 ld a, $DF
35 cp h
36 jp nz, .wr
37 ld a, $80
38 cp l
39 jp nz, .wr
40
41 ld hl, $C000 ; Read loop
42.rd:
43 ld a,h
44 xor l
45 ld b,a
46 ld a, [hli]
47 cp b
48 jp nz, .memfail
49
50 ld a, $DF
51 cp h
52 jp nz, .rd
53 ld a, $80
54 cp l
55 jp nz, .rd
56
57 ld hl, testokstr ; Say we're OK
58 call puts
59 ret
60.memfail: ; Say we failed (sadface)
61 ; decrement hl the easy way
62 ld a,[hld]
63 push hl
64 ld hl, failatstr
65 call puts
66 pop hl
67 ld a, h
68 call puthex
69 ld a, l
70 call puthex
71 ld a, $0A
72 call putc
73 ld a, $0D
74 call putc
75 ret
76memteststr:
77 db "Testing memory from $C000 to $DF80...",0
78testokstr:
79 db " OK!",$0D,$0A,0
80failatstr:
81 db " Test failed at $",0
82
83puthex: ; Put two hex nibbles to the serial console.
84 push af
85 rra
86 rra
87 rra
88 rra
89 ld b,$0F
90 and b
91 ld b,$30
92 add b
93 call putc
94 pop af
95 ld b,$0F
96 and b
97 ld b,$30
98 add b
99 call putc
100 ret
101
102; Wait for switches to be flipped on and off again.
103waitsw:
104 ld hl,waitswstr
105 call puts
106
107 ld c, $51
108 ld a, $00
109 ld [c],a
110
111 ld c, $51
112 ld b, $0
113.loop1:
114 ld a,[c]
115 cp b
116 jp z,.loop1
117.loop2:
118 ld a,[c]
119 cp b
120 jp nz,.loop2
121 ret
122
123waitswstr:
124 db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset.",$0D,$0A,0
125
126; Core instruction basic acceptance tests.
127insntest:
128 ld hl, .insnteststr
129 call puts
130
131 ; Test PUSH and POP.
132 ld b, $12
133 ld c, $34
134 ld d, $56
135 ld e, $78
136 push bc
137 pop de
138 ld hl, .pushpopfail
139 ld a, d
140 cp b
141 jp nz,.fail
142 ld a, e
143 cp c
144 jp nz,.fail
145
146 ; Test ALU (HL).
147 ld hl, .ff
148 ld a, $FF
149 xor [hl]
150 ld hl, .xorhlfail
151 jp nz, .fail
152
153 ; Test CP.
154 ld hl, .cpfail
155 ld a, $10
156 ld b, $20
157 cp b
158 jp nc,.fail
159 ld a, $20
160 ld b, $10
161 cp b
162 jp c,.fail
163
164 ; Test CPL
165 ld hl, .cplfail
166 ld a, $55
167 ld b, $AA
168 cpl
169 cp b
170 jp nz,.fail
171
172 ld hl, .ok
173 call puts
174 ret
175.fail:
176 call puts
177 ret
178.insnteststr:
179 db "Testing instructions... ",$0
180.pushpopfail:
181 db "PUSH/POP test failed.",$0D,$0A,0
182.ff:
183 db $FF
184.xorhlfail:
185 db "XOR [HL] test failed.",$0D,$0A,0
186.cpfail:
187 db "CP test failed.",$0D,$0A,0
188.cplfail:
189 db "CPL test failed.",$0D,$0A,0
190.ok:
191 db "OK!",$0D,$0A,0
192
193; Serial port manipulation functions.
194putc:
195 push af
196 ld b, 0
197 ld c, $50
198.waitport:
199 ld a,[c]
200 cp b
201 jp nz,.waitport
202 pop af
203 ld [c],a
204 ret
205
206puts:
207 ld a, [hli]
208 ld b, $00
209 cp b
210 jp z, .done
211 call putc
212 jp puts
213.done:
214 ret
215
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