]> Joshua Wise's Git repositories - fpgaboy.git/blame_incremental - rom.asm
RETCC that breaks everything. Why?
[fpgaboy.git] / rom.asm
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CommitLineData
1 SECTION "a",HOME
2
3main:
4 ld c, $51 ; Note that we are alive.
5 ld a, $FF
6 ld [c],a
7
8 ld sp, $DFFF
9
10 ld hl, signon
11 call puts
12
13 call memtest
14
15 call insntest
16
17 call waitsw
18
19 jr main
20
21signon:
22 db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
23
24; Memory tester: writes h ^ l to all addresses from C000 to DF80.
25memtest:
26 ld hl,memteststr
27 call puts
28
29 ld hl, $C000 ; Write loop
30.wr:
31 ld a,h
32 xor l
33 ld [hli],a
34 ld a, $DF
35 cp h
36 jr nz, .wr
37 ld a, $80
38 cp l
39 jr nz, .wr
40
41 ld hl, $C000 ; Read loop
42.rd:
43 ld a,h
44 xor l
45 ld b,a
46 ld a, [hli]
47 cp b
48 jr nz, .memfail
49
50 ld a, $DF
51 cp h
52 jr nz, .rd
53 ld a, $80
54 cp l
55 jr nz, .rd
56
57 ld hl, testokstr ; Say we're OK
58 call puts
59 ret
60.memfail: ; Say we failed (sadface)
61 ; decrement hl the easy way
62 ld a,[hld]
63 push hl
64 ld hl, failatstr
65 call puts
66 pop hl
67 ld a, h
68 call puthex
69 ld a, l
70 call puthex
71 ld a, $0A
72 call putc
73 ld a, $0D
74 call putc
75 ret
76memteststr:
77 db "Testing memory from $C000 to $DF80...",0
78testokstr:
79 db " OK!",$0D,$0A,0
80failatstr:
81 db " Test failed at $",0
82
83puthex: ; Put two hex nibbles to the serial console.
84 push af
85 rra
86 rra
87 rra
88 rra
89 ld b,$0F
90 and b
91 ld b,$30
92 add b
93 call putc
94 pop af
95 ld b,$0F
96 and b
97 ld b,$30
98 add b
99 call putc
100 ret
101
102; Wait for switches to be flipped on and off again.
103waitsw:
104 ld hl,waitswstr
105 call puts
106
107 ld c, $51
108 ld a, $00
109 ld [c],a
110
111 ld c, $51
112 ld b, $0
113.loop1:
114 ld a,[c]
115 cp b
116 jr z,.loop1
117.loop2:
118 ld a,[c]
119 cp b
120 jr nz,.loop2
121 ret
122
123waitswstr:
124 db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset.",$0D,$0A,0
125
126; Core instruction basic acceptance tests.
127insntest:
128 ld hl, .insnteststr
129 call puts
130
131 ; Test PUSH and POP.
132 ld b, $12
133 ld c, $34
134 ld d, $56
135 ld e, $78
136 push bc
137 pop de
138 ld hl, .pushpopfail
139 ld a, d
140 cp b
141 jr nz,.fail
142 ld a, e
143 cp c
144 jr nz,.fail
145
146 ; Test ALU (HL).
147 ld hl, .ff
148 ld a, $FF
149 xor [hl]
150 ld hl, .xorhlfail
151 jr nz, .fail
152
153 ; Test JP (HL)
154 ld hl, .jphl
155 jp [hl]
156 ld hl, .jphlfail
157 jr .fail
158 rst $00
159.jphl:
160
161 ; Test JR
162 ld a, $FF
163 ld b, $00
164 cp b
165 jr nz,.jr
166 ld hl, .jrfail
167 jr .fail
168 rst $00
169.jr:
170
171 ; Test CP.
172 ld hl, .cpfail
173 ld a, $10
174 ld b, $20
175 cp b
176 jr nc,.fail
177 ld a, $20
178 ld b, $10
179 cp b
180 jr c,.fail
181
182 ; Test CPL
183 ld hl, .cplfail
184 ld a, $55
185 ld b, $AA
186 cpl
187 cp b
188 jr nz,.fail
189
190 ld hl, .ok
191 call puts
192 ret
193.fail:
194 call puts
195 ld hl, .testfailed
196 call puts
197 ret
198.insnteststr:
199 db "Testing instructions... ",0
200.pushpopfail:
201 db "PUSH/POP",0
202.ff:
203 db $FF
204.xorhlfail:
205 db "XOR [HL]",0
206.jphlfail:
207 db "JP [HL]",0
208.jrfail:
209 db "JR",0
210.cpfail:
211 db "CP",0
212.cplfail:
213 db "CPL",0
214.testfailed:
215 db "test failed.",$0D,$0A,0
216.ok:
217 db "OK!",$0D,$0A,0
218
219; Serial port manipulation functions.
220putc:
221 push af
222 ld b, 0
223 ld c, $50
224.waitport:
225 ld a,[c]
226 cp b
227 jr nz,.waitport
228 pop af
229 ld [c],a
230 ret
231
232puts:
233 ld a, [hli]
234 ld b, $00
235 cp b
236 jr z, .done
237 call putc
238 jr puts
239.done:
240 ret
241
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