Joshua Wise's Git repositories - fpgaboy.git/blame_incremental

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Commit	Line	Data
	1	SECTION "a",HOME
	2
	3	main:
	4	ld c, $51 ; Note that we are alive.
	5	ld a, $FF
	6	ld [c],a
	7
	8	ld sp, $DFF0
	9
	10	ld hl, signon
	11	call puts
	12
	13	call memtest
	14
	15	call insntest
	16
	17	call waitsw
	18
	19	jr main
	20
	21	signon:
	22	db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
	23
	24	; Memory tester: writes h ^ l to all addresses from C000 to DF80.
	25	memtest:
	26	ld hl,memteststr
	27	call puts
	28
	29	ld hl, $C001 ; Write loop
	30	.wr:
	31	ld a,h
	32	xor l
	33	ld [hli],a
	34	ld a, $DF
	35	cp h
	36	jr nz, .wr
	37	ld a, $80
	38	cp l
	39	jr nz, .wr
	40
	41	ld hl, $C001 ; Read loop
	42	.rd:
	43	ld a,h
	44	xor l
	45	ld b,a
	46	ld a, [hli]
	47	cp b
	48	jr nz, .memfail
	49
	50	ld a, $DF
	51	cp h
	52	jr nz, .rd
	53	ld a, $80
	54	cp l
	55	jr nz, .rd
	56
	57	ld hl, testokstr ; Say we're OK
	58	call puts
	59	ret
	60	.memfail: ; Say we failed (sadface)
	61	; decrement hl the easy way
	62	ld a,[hld]
	63	push hl
	64	ld hl, failatstr
	65	call puts
	66	pop hl
	67	ld a, h
	68	call puthex
	69	ld a, l
	70	call puthex
	71	ld a, $0A
	72	call putc
	73	ld a, $0D
	74	call putc
	75	ret
	76	memteststr:
	77	db "Testing memory from $C000 to $DF80...",0
	78	testokstr:
	79	db " OK!",$0D,$0A,0
	80	failatstr:
	81	db " Test failed at $",0
	82
	83	puthex: ; Put two hex nibbles to the serial console.
	84	push af
	85	rra
	86	rra
	87	rra
	88	rra
	89	ld b,$0F
	90	and b
	91	ld b,$30
	92	add b
	93	call putc
	94	pop af
	95	ld b,$0F
	96	and b
	97	ld b,$30
	98	add b
	99	call putc
	100	ret
	101
	102	; Wait for switches to be flipped on and off again.
	103	waitsw:
	104	ld hl,waitswstr
	105	call puts
	106
	107	ld c, $51
	108	xor a
	109	ld [c],a
	110
	111	ld b, $0
	112	.loop1:
	113	ld a,[c]
	114	cp b
	115	jr z,.loop1
	116	.loop2:
	117	ld a,[c]
	118	cp b
	119	jr nz,.loop2
	120	ret
	121
	122	waitswstr:
	123	db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset. Expect A.",$0D,$0A,0
	124
	125	; Core instruction basic acceptance tests.
	126	insntest:
	127	ld hl, .insnteststr
	128	call puts
	129
	130	; Test PUSH and POP.
	131	ld b, $12
	132	ld c, $34
	133	ld d, $56
	134	ld e, $78
	135	push bc
	136	pop de
	137	ld hl, .pushpopfail
	138	ld a, d
	139	cp b
	140	jr nz,.fail
	141	ld a, e
	142	cp c
	143	jr nz,.fail
	144
	145	; Test ALU (HL).
	146	ld hl, .ff
	147	ld a, $FF
	148	xor [hl]
	149	ld hl, .xorhlfail
	150	jr nz, .fail
	151
	152	; Test JP (HL)
	153	ld hl, .jphl
	154	jp [hl]
	155	ld hl, .jphlfail
	156	jr .fail
	157	rst $00
	158	.jphl:
	159
	160	; Test JR
	161	ld a, $FF
	162	ld b, $00
	163	cp b
	164	jr nz,.jr
	165	ld hl, .jrfail
	166	jr .fail
	167	rst $00
	168	.jr:
	169
	170	; Test inc16
	171	ld d, $12
	172	ld e, $FF
	173	ld hl, .inc16fail
	174	inc de
	175	ld a, $13
	176	cp d
	177	jr nz, .fail
	178	ld a, $00
	179	cp e
	180	jr nz, .fail
	181
	182	; Test CP.
	183	ld hl, .cpfail
	184	ld a, $10
	185	ld b, $20
	186	cp b
	187	jr nc,.fail
	188	ld a, $20
	189	ld b, $10
	190	cp b
	191	jr c,.fail
	192
	193	; Test CPL
	194	ld hl, .cplfail
	195	ld a, $55
	196	ld b, $AA
	197	cpl
	198	cp b
	199	jr nz,.fail
	200
	201	ld hl, .ok
	202	call puts
	203	ret
	204	.fail:
	205	call puts
	206	ld hl, .testfailed
	207	call puts
	208	ret
	209	.insnteststr:
	210	db "Testing instructions... ",0
	211	.pushpopfail:
	212	db "PUSH/POP",0
	213	.ff:
	214	db $FF
	215	.xorhlfail:
	216	db "XOR [HL]",0
	217	.jphlfail:
	218	db "JP [HL]",0
	219	.jrfail:
	220	db "JR",0
	221	.cpfail:
	222	db "CP",0
	223	.cplfail:
	224	db "CPL",0
	225	.inc16fail:
	226	db "INC16",0
	227	.testfailed:
	228	db " test failed.",$0D,$0A,0
	229	.ok:
	230	db "OK!",$0D,$0A,0
	231
	232	; Serial port manipulation functions.
	233	putc:
	234	ld b, 0
	235	ld c, $50
	236	push af
	237	.waitport:
	238	ld a,[c]
	239	cp b
	240	jr nz,.waitport
	241	pop af
	242	ld [c],a
	243	ret
	244
	245	puts:
	246	ld a, [hli]
	247	ld b, $00
	248	cp b
	249	ret z
	250	call putc
	251	jr puts