]> Joshua Wise's Git repositories - fpgaboy.git/blame - sim.cmd
Set up the bus a little before the clock.
[fpgaboy.git] / sim.cmd
CommitLineData
58d068d4 1vcd dumpfile /proc/self/fd/[string range [open |./readout "w"] 4 1000]
753fcbc6
JW
2vcd dumpvars -m Dumpable
3run 1000ms
This page took 0.022002 seconds and 4 git commands to generate.