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[fpgaboy.git] / core / insn_pop_reg.v
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1`ifdef EXECUTE
2 `INSN_POP_reg: begin /* POP is 12 cycles! */
3 case (cycle)
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4 0: `EXEC_READ(`_SP)
5 1: `EXEC_READ(`_SP + 1)
81358c71 6 2: begin
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7 `EXEC_NEWCYCLE
8 `EXEC_INC_PC
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9 end
10 endcase
11 end
12`endif
13
14`ifdef WRITEBACK
15 `INSN_POP_reg: begin /* POP is 12 cycles! */
16 case (cycle)
17 0: begin end
18 1: begin
19 case (opcode[5:4])
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20 `INSN_stack_AF: `_F <= rdata;
21 `INSN_stack_BC: `_C <= rdata;
22 `INSN_stack_DE: `_E <= rdata;
23 `INSN_stack_HL: `_L <= rdata;
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24 endcase
25 end
26 2: begin
27 case (opcode[5:4])
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28 `INSN_stack_AF: `_A <= rdata;
29 `INSN_stack_BC: `_B <= rdata;
30 `INSN_stack_DE: `_D <= rdata;
31 `INSN_stack_HL: `_H <= rdata;
81358c71 32 endcase
5c33c5c0 33 `_SP <= `_SP + 2;
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34 end
35 endcase
36 end
37`endif
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