Move the core to core/

[fpgaboy.git] / core / insn_ld_reg_hl.v

`ifdef EXECUTE
	`INSN_LD_reg_HL: begin
		case(cycle)
		0:	`EXEC_READ(`_HL)
		1:	begin
				`EXEC_INC_PC
				`EXEC_NEWCYCLE
			end
		endcase
	end
`endif

`ifdef WRITEBACK
	`INSN_LD_reg_HL: begin
		case (cycle)
		0:	begin end
		1:	case (opcode[5:3])
			`INSN_reg_A:	`_A <= rdata;
			`INSN_reg_B:	`_B <= rdata;
			`INSN_reg_C:	`_C <= rdata;
			`INSN_reg_D:	`_D <= rdata;
			`INSN_reg_E:	`_E <= rdata;
			`INSN_reg_H:	`_H <= rdata;
			`INSN_reg_L:	`_L <= rdata;
			endcase
		endcase
	end
`endif