Merge branch 'master' of lu@anyus.res.cmu.edu:/storage/fpga/FPGABoy

[fpgaboy.git] / core / insn_call-callcc.v

`define INSN_CALL		9'b011001101
`define INSN_CALLCC		9'b0110xx100	// Not that call/cc.

`ifdef EXECUTE
	`INSN_CALL,`INSN_CALLCC: begin
		case (cycle)
		0:	begin
				`EXEC_INC_PC
				`EXEC_READ(`_PC + 1)
			end
		1:	begin
				`EXEC_INC_PC
				`EXEC_READ(`_PC + 1)
			end
		2:	begin
				`EXEC_INC_PC
				if (!opcode[0])	// i.e., is callcc
					/* We need to check the condition code to bail out. */
					case (opcode[4:3])
					`INSN_cc_NZ:	if (`_F[7]) `EXEC_NEWCYCLE
					`INSN_cc_Z:	if (~`_F[7]) `EXEC_NEWCYCLE
					`INSN_cc_NC:	if (`_F[4]) `EXEC_NEWCYCLE
					`INSN_cc_C:	if (~`_F[4]) `EXEC_NEWCYCLE
					endcase
			end
		3:	`EXEC_WRITE(`_SP - 1, `_PCH)
		4:	`EXEC_WRITE(`_SP - 2, `_PCL)
		5:	`EXEC_NEWCYCLE
		endcase
	end
`endif

`ifdef WRITEBACK
	`INSN_CALL,`INSN_CALLCC: begin
		case (cycle)
		0:	begin /* type F */ end
		1:	tmp <= rdata;	// tmp contains newpcl
		2:	tmp2 <= rdata;	// tmp2 contains newpch
		3:	begin /* type F */ end
		4:	`_PCH <= tmp2;
		5:	begin
				`_PCL <= tmp;
				`_SP <= `_SP - 2;
			end
		endcase
	end
`endif