[fpgaboy.git] / core / insn_add_sp_imm8.v

`define INSN_ADD_SP_IMM8		9'b011101000

`ifdef EXECUTE
	`INSN_ADD_SP_IMM8: begin
		case (cycle)
		0:	begin
				`EXEC_INC_PC
			end
		1:	begin
				`EXEC_READ(`_PC)
			end
		3:	begin
				`EXEC_NEWCYCLE
				`EXEC_INC_PC
			end
		endcase
	end
`endif

`ifdef WRITEBACK
	`INSN_ADD_SP_IMM8: begin
		case (cycle)
		2:	`_SP <= `_SP + {rdata[7] ? 8'hFF : 8'h00, rdata};
		endcase
	end
`endif
Commit	Line	Data
41341eb3 JW	1	`define INSN_ADD_SP_IMM8 9'b011101000
	2
	3	`ifdef EXECUTE
	4	`INSN_ADD_SP_IMM8: begin
	5	case (cycle)
	6	0: begin
	7	`EXEC_INC_PC
	8	end
	9	1: begin
	10	`EXEC_READ(`_PC)
	11	end
	12	3: begin
	13	`EXEC_NEWCYCLE
	14	`EXEC_INC_PC
	15	end
	16	endcase
	17	end
	18	`endif
	19
	20	`ifdef WRITEBACK
	21	`INSN_ADD_SP_IMM8: begin
	22	case (cycle)
9e1c03b6	23	2: `_SP <= `_SP + {rdata[7] ? 8'hFF : 8'h00, rdata};
41341eb3 JW	24	endcase
	25	end
	26	`endif