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Flop the clock polarity of the LCDC around.
[fpgaboy.git] / sim.cmd
CommitLineData
58d068d4 1vcd dumpfile /proc/self/fd/[string range [open |./readout "w"] 4 1000]
753fcbc6
JW		 2vcd dumpvars -m Dumpable
3run 1000ms
Partial Nintendo GameBoy / GBZ80 implementation on a Xilinx FPGA
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