Fix tileaddr bug. Make bus interface more explicit.
[fpgaboy.git] / insn_ret-retcc.v
CommitLineData
df770340
JW
1`ifdef EXECUTE
2 `INSN_RET,`INSN_RETCC: begin
3 case (cycle)
5c33c5c0 4 0: `EXEC_READ(`_SP)
df770340 5 1: begin // SPECIAL CASE: cycle does NOT increase linearly with ret!
5c33c5c0 6 `EXEC_INC_PC // cycle 1 is skipped if we are not retcc
df770340 7 case (opcode[4:3])
5c33c5c0
JW
8 `INSN_cc_NZ: if (registers[`REG_F][7]) `EXEC_NEWCYCLE
9 `INSN_cc_Z: if (~registers[`REG_F][7]) `EXEC_NEWCYCLE
10 `INSN_cc_NC: if (registers[`REG_F][4]) `EXEC_NEWCYCLE
11 `INSN_cc_C: if (~registers[`REG_F][4]) `EXEC_NEWCYCLE
df770340 12 endcase
5c33c5c0 13 `EXEC_READ(`_SP) // retry the read
df770340 14 end
5c33c5c0 15 2: `EXEC_READ(`_SP + 1)
df770340 16 3: begin /* twiddle thumbs */ end
5c33c5c0 17 4: `EXEC_NEWCYCLE
df770340
JW
18 endcase
19 end
20`endif
21
22`ifdef WRITEBACK
23 `INSN_RET,`INSN_RETCC: begin
24 case (cycle)
25 0: if (opcode[0]) // i.e., not RETCC
26 cycle <= 1; // Skip cycle 1; it gets incremented on the next round.
27 1: begin /* Nothing need happen here. */ end
5c33c5c0
JW
28 2: `_PCL <= rdata;
29 3: `_PCH <= rdata;
df770340 30 4: begin
5c33c5c0 31 `_SP <= `_SP + 2;
df770340
JW
32 if (opcode[4] && opcode[0]) /* RETI */
33 ie <= 1;
34 end
35 endcase
36 end
37`endif
This page took 0.020846 seconds and 4 git commands to generate.