Add a dirty hack to make the sim pipe directly to the readout script.
[fpgaboy.git] / insn_rst.v
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1`ifdef EXECUTE
2 `INSN_RST: begin
3 case (cycle)
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4 0: `EXEC_INC_PC // This goes FIRST in RST
5 1: `EXEC_WRITE(`_SP - 1, `_PCH)
6 2: `EXEC_WRITE(`_SP - 2, `_PCL)
df770340 7 3: begin
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8 `EXEC_NEWCYCLE
9 `_PC <= {10'b0,opcode[5:3],3'b0};
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10 end
11 endcase
12 end
13`endif
14
15`ifdef WRITEBACK
16 `INSN_RST: begin
17 case (cycle)
18 0: begin /* type F */ end
19 1: begin /* type F */ end
20 2: begin /* type F */ end
5c33c5c0 21 3: `_SP <= `_SP - 2;
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22 endcase
23 end
24`endif
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