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[fpgaboy.git] / core / insn_ldhl_sp_imm8.v
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1`define INSN_LDHL_SP_IMM8 9'b011111000
2
3`ifdef EXECUTE
4 `INSN_LDHL_SP_IMM8: begin
5 case (cycle)
6 0: begin
7 `EXEC_INC_PC
8 end
9 1: begin
10 `EXEC_READ(`_PC)
11 end
12 2: begin
13 `EXEC_NEWCYCLE
14 `EXEC_INC_PC
15 end
16 endcase
17 end
18`endif
19
20`ifdef WRITEBACK
21 `INSN_LDHL_SP_IMM8: begin
22 case (cycle)
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23 2: begin
24 `_HL <= `_SP + {rdata[7] ? 8'hFF : 8'h00, rdata};
25 `_F <= {
26 2'b00,
27 (({1'b0,`_SPL[3:0]} + {1'b0,rdata[3:0]}) & 5'h10) ? 1'b1 : 1'b0,
28 (({1'b0,`_SPL} + {1'b0,rdata}) & 9'h100) ? 1'b1 : 1'b0,
29 `_F[3:0]
30 };
31 end
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32 endcase
33 end
34`endif
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