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memory: ldm/stm ready for testing, hopefully
2009-01-07 Christopher Lumemory: ldm/stm ready for testing, hopefully
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2009-01-06 Christopher Lumerge memory
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2009-01-06 Christopher Lumemory: more ldm/stm
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2009-01-06 Christopher LuMerge branch 'master' of nyus.joshuawise.com:/git/firearm
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2009-01-06 Christopher Lumemory: more ldm/stm
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2009-01-06 Christopher Lumemory: add some stuff in ldm/stm
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2009-01-06 Christopher Lumemory: fix up slightly
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2009-01-06 Christopher Lumemory: fixed up a bit
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2009-01-06 Christopher Lumemory: preliminary, regfile: more read port, decode...
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2009-01-05 Christopher Luexecute: do stuff only if bubble, still incorrect
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2009-01-05 Christopher Luflush generate bubble, yes
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2009-01-05 Christopher LuMerge branch 'master' of nyus.joshuawise.com:/git/firearm
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2009-01-05 Christopher Luyou snipeer
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2009-01-05 Christopher Luadded branch support, maybe
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2009-01-05 Christopher LuMerge branch 'master' of nyus.joshuawise.com:/git/firearm
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2009-01-05 Christopher Lureally fix execute
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2009-01-05 Christopher Lubranch added
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2009-01-05 Christopher Lufixed v flag
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2008-12-29 Christopher LuExecute: most of an ALU, ARM_Constants: RBC -> RSC
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2008-12-28 Christopher Luram.hex: uppercase it, ram.comments.hex: comments
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2008-12-28 Christopher Luram.hex: use r1 for demonstration of ror
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2008-12-28 Christopher LuMerge branch 'master' of nyus.joshuawise.com:/git/firearm
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2008-12-28 Christopher Ludecode: fix, regfile: different starting constants...
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2008-12-28 Christopher Ludecode: make a real rotator instead of a loss
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2008-12-28 Christopher LuDecode.v: shifter now less incorrect
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2008-12-28 Christopher Ludecode compiles
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2008-12-28 Christopher Ludecode shift suck less
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2008-12-26 Christopher Lusome stuff
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2008-12-26 Christopher LuMerge branch 'master' of nyus.joshuawise.com:/git/firearm
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2008-12-26 Christopher Luconstants: discus
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FireARM pipelined ARM-like CPU implementation in Verilog
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