From 056fa141e0cb4366a264458bb8b927126ef85aeb Mon Sep 17 00:00:00 2001
From: Joshua Wise <joshua@escape.joshuawise.com>
Date: Sun, 21 Feb 2010 22:26:54 -0500
Subject: [PATCH 1/1] Makefile: Add 'auto' target to verilog-modeify.

---
 Makefile | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Makefile b/Makefile
index daa9291..766e6ea 100644
--- a/Makefile
+++ b/Makefile
@@ -9,4 +9,7 @@ obj_dir/Vsystem.mk: $(VLOGS)
 	mkdir -p obj_dir
 	verilator --cc system.v testbench.cpp --exe
 
+auto: .DUMMY
+	emacs -l ~/elisp/verilog-mode.el --batch system.v -f verilog-batch-auto
+
 .DUMMY:
\ No newline at end of file
-- 
2.39.2