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Memory: Fix FSM for LDR/STR. Fix pre/post increment to be, uh, pre/post increment...
[firearm.git] / ram.comments.hex
2009-01-10 Christopher LuMerge branch 'master' of nyus.joshuawise.com:/git/firearm blob | commitdiff | raw
2009-01-09 Joshua WiseMerge nyus:/storage/git/firearm blob | commitdiff | raw
2009-01-09 Joshua WiseAdd 'mov r1, #':' to ramfile. blob | commitdiff | raw
2009-01-09 Christopher LuMerge branch 'master' of nyus.joshuawise.com:/git/firearm blob | commitdiff | raw | diff to current
2009-01-09 Joshua Wiseram.hex: Add performance benchmark, P-SPEC 2009. blob | commitdiff | raw | diff to current
2009-01-07 Joshua WiseAdd LDR test instruction. blob | commitdiff | raw | diff to current
2009-01-05 Joshua WiseOk, it work. blob | commitdiff | raw | diff to current
2009-01-05 Christopher LuMerge branch 'master' of nyus.joshuawise.com:/git/firearm blob | commitdiff | raw | diff to current
2009-01-05 Joshua WiseAdd a jump test blob | commitdiff | raw | diff to current
2008-12-31 Joshua Wiseram{.comments,}.hex: Add a multiplier test. blob | commitdiff | raw | diff to current
2008-12-31 Joshua Wiseram{.comments,}.hex: Add a simple orr instruction.... blob | commitdiff | raw | diff to current
2008-12-28 Joshua WiseMerge nyus:/storage/git/firearm blob | commitdiff | raw | diff to current
2008-12-28 Christopher Luram.hex: uppercase it, ram.comments.hex: comments blob | commitdiff | raw | diff to current
FireARM pipelined ARM-like CPU implementation in Verilog
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