From: Christopher Lu <lu@stop.hsd1.pa.comcast.net>
Date: Wed, 7 Jan 2009 09:45:21 +0000 (-0500)
Subject: memory: merged
X-Git-Url: http://git.joshuawise.com/firearm.git/commitdiff_plain/dbdf315047f239d9483847bdd3f32f037908537b

memory: merged
---

dbdf315047f239d9483847bdd3f32f037908537b
diff --cc Memory.v
index c9d080d,2885add..bf25447
--- a/Memory.v
+++ b/Memory.v
@@@ -89,45 -97,19 +97,48 @@@ module Memory
  		next_write_reg = write_reg;
  		next_write_num = write_num;
  		next_write_data = write_data;
 -		next_inc_next = 1'b0;
  		next_outbubble = inbubble;
  		outstall = 1'b0;
 -		next_regs = 16'b0;
 -		next_started = started;
 +		next_regs = regs;
+ 		cp_req = 1'b0;
+ 		cp_rnw = 1'bx;
+ 		cp_write = 32'hxxxxxxxx;
  		offset = prev_offset;
 -		next_outcpsr = started ? out_cpsr : cpsr;
 +		next_outcpsr = lsm_state == 3'b010 ? out_cpsr : cpsr;
 +		next_lsm_state = lsm_state;
 +		next_lsr_state = lsr_state;
 +		next_swp_oldval = swp_oldval;
 +		next_swp_state = swp_state;
 +		cur_reg = prev_reg;
  
  		casez(insn)
 +		`DECODE_ALU_SWP: begin
 +			if(!inbubble) begin
 +				outstall = rw_wait;
 +				next_outbubble = rw_wait;
 +				busaddr = {op0[31:2], 2'b0};
 +				case(swp_state)
 +				2'b01: begin
 +					rd_req = 1'b1;
 +					outstall = 1'b1;
 +					if(!rw_wait) begin
 +						next_swp_state = 2'b10;
 +						next_swp_oldval = rd_data;
 +					end
 +				end
 +				2'b10: begin
 +					wr_req = 1'b1;
 +					wr_data = op1;
 +					next_write_reg = 1'b1;
 +					next_write_num = insn[15:12];
 +					next_write_data = swp_oldval;
 +					if(!rw_wait)
 +						next_swp_state = 2'b01;
 +				end
 +				default: begin end
 +				endcase
 +			end
 +		end
  		`DECODE_LDRSTR_UNDEFINED: begin end
  		`DECODE_LDRSTR: begin
  			if (!inbubble) begin
@@@ -281,23 -256,44 +292,55 @@@
  
  				st_read = cur_reg;
  				wr_data = st_data;
 -
 -				next_inc_next = next_regs == 16'b0;
 -				next_notdone = ~next_inc_next | rw_wait;
  				busaddr = {raddr[31:2], 2'b0};
 +
 +				outstall = 1'b1;
 +
 +				if(next_regs == 16'b0) begin
 +					next_lsm_state = 3'b100;
 +				end
 +			end
 +			3'b100: begin
 +				next_write_reg = 1'b1;
 +				next_write_num = insn[19:16];
 +				next_write_data = insn[23] ? op0 + {26'b0, prev_offset} : op0 - {26'b0, prev_offset};
 +				next_lsm_state = 3'b001;
  			end
 +			default: begin end
 +			endcase
  		end
+ 		`DECODE_LDCSTC: begin
+ 			$display("WARNING: Unimplemented LDCSTC");
+ 		end
+ 		`DECODE_CDP: begin
+ 			cp_req = 1;
+ 			if (cp_busy) begin
+ 				outstall = 1;
+ 				next_outbubble = 1;
+ 			end
+ 			if (!cp_ack) begin
+ 				/* XXX undefined instruction trap */
+ 				$display("WARNING: Possible CDP undefined instruction");
+ 			end
+ 		end
+ 		`DECODE_MRCMCR: begin
+ 			cp_req = 1;
+ 			cp_rnw = insn[20] /* L */;
+ 			if (insn[20] == 0 /* store to coprocessor */)
+ 				cp_write = op0;
+ 			else begin
+ 				next_write_reg = 1'b1;
+ 				next_write_num = insn[15:12];
+ 				next_write_data = cp_read;
+ 			end
+ 			if (cp_busy) begin
+ 				outstall = 1;
+ 				next_outbubble = 1;
+ 			end
+ 			if (!cp_ack) begin
+ 				$display("WARNING: Possible MRCMCR undefined instruction");
+ 			end
+ 		end
  		default: begin end
  		endcase
  	end