From: Joshua Wise Date: Thu, 25 Dec 2008 07:00:26 +0000 (-0500) Subject: a bit of issue X-Git-Url: http://git.joshuawise.com/firearm.git/commitdiff_plain/60cc768b367a222c27f12506e2ffe363eb3e9282 a bit of issue --- diff --git a/Issue.v b/Issue.v new file mode 100644 index 0000000..a303e85 --- /dev/null +++ b/Issue.v @@ -0,0 +1,44 @@ +module Issue( + input clk, + input Nrst, + + input stall, /* pipeline control */ + input flush, + + input inbubble, /* stage inputs */ + input [31:0] insn, + input [31:0] inpc, + + output reg outbubble, /* stage outputs */ + output reg [31:0] outpc + /* other */ + ); + + always @(posedge clk) + begin + outbubble <= inbubble; + outpc <= inpc; + end + +`ifdef COPY_PASTA_FODDER + /* from page 2 of ARM7TDMIvE2.pdf */ + casex (insn) + 32'b????000000??????????????1001????: /* Multiply -- must come before ALU, because it pattern matches a specific case of ALU */ + 32'b????00001???????????????1001????: /* Multiply long */ + 32'b????00??????????????????????????: /* ALU */ + 32'b????00010?00????????00001001????: /* Atomic swap */ + 32'b????000100101111111111110001????: /* Branch */ + 32'b????000??0??????????00001??1????: /* Halfword transfer - register offset */ + 32'b????000??1??????????00001??1????: /* Halfword transfer - register offset */ + 32'b????011????????????????????1????: /* Undefined. I hate ARM */ + 32'b????01??????????????????????????: /* Single data transfer */ + 32'b????100?????????????????????????: /* Block data transfer */ + 32'b????101?????????????????????????: /* Branch */ + 32'b????110?????????????????????????: /* Coprocessor data transfer */ + 32'b????1110???????????????????0????: /* Coprocessor data op */ + 32'b????1110???????????????????1????: /* Coprocessor register transfer */ + 32'b????1111????????????????????????: /* SWI */ + endcase +`endif + +endmodule