From: Joshua Wise <joshua@escape.joshuawise.com>
Date: Mon, 22 Feb 2010 03:26:54 +0000 (-0500)
Subject: Makefile: Add 'auto' target to verilog-modeify.
X-Git-Url: http://git.joshuawise.com/firearm.git/commitdiff_plain/056fa141e0cb4366a264458bb8b927126ef85aeb?hp=6d8250a2274c30477c543fa7279b9f3052afcca2;ds=sidebyside

Makefile: Add 'auto' target to verilog-modeify.
---

diff --git a/Makefile b/Makefile
index daa9291..766e6ea 100644
--- a/Makefile
+++ b/Makefile
@@ -9,4 +9,7 @@ obj_dir/Vsystem.mk: $(VLOGS)
 	mkdir -p obj_dir
 	verilator --cc system.v testbench.cpp --exe
 
+auto: .DUMMY
+	emacs -l ~/elisp/verilog-mode.el --batch system.v -f verilog-batch-auto
+
 .DUMMY:
\ No newline at end of file