X-Git-Url: http://git.joshuawise.com/firearm.git/blobdiff_plain/ee4068391a94ca33bcec919274ef17496c0a7d6b..bd0731755c59cae2ae02842e17fc77f4668301bc:/system.v diff --git a/system.v b/system.v index a653ea1..ebf0882 100644 --- a/system.v +++ b/system.v @@ -1,10 +1,11 @@ `define BUS_ICACHE 0 -module System(); +module System(input clk); wire [7:0] bus_req; wire [7:0] bus_ack; wire [31:0] bus_addr; - wire [31:0] bus_data; + wire [31:0] bus_rdata; + wire [31:0] bus_wdata; wire bus_rd, bus_wr; wire bus_ready; @@ -15,16 +16,30 @@ module System(); wire bus_rd_icache; wire bus_wr_icache; + wire [31:0] bus_rdata_blockram; + wire bus_ready_blockram; + assign bus_addr = bus_addr_icache; - assign bus_data = bus_wdata_icache; + assign bus_rdata = bus_rdata_blockram; + assign bus_wdata = bus_wdata_icache; assign bus_rd = bus_rd_icache; assign bus_wr = bus_wr_icache; + assign bus_ready = bus_ready_blockram; BusArbiter busarbiter(.bus_req(bus_req), .bus_ack(bus_ack)); - ICache( + + ICache icache( + .clk(clk), .rd_addr(), .rd_req(), .rd_wait(), .rd_data(), .bus_req(bus_req_icache), .bus_ack(bus_ack_icache), - .bus_addr(bus_addr_icache), .bus_rdata(bus_data), + .bus_addr(bus_addr_icache), .bus_rdata(bus_rdata), .bus_wdata(bus_wdata_icache), .bus_rd(bus_rd_icache), .bus_wr(bus_wr_icache), .bus_ready(bus_ready)); + + BlockRAM blockram( + .clk(clk), + .bus_addr(bus_addr), .bus_rdata(bus_rdata_blockram), + .bus_wdata(bus_wdata), .bus_rd(bus_rd), .bus_wr(bus_wr), + .bus_ready(bus_ready_blockram)); + endmodule