X-Git-Url: http://git.joshuawise.com/firearm.git/blobdiff_plain/ec3250aa3b07ac33432383e34565b12465ef3444..778ef14fd7c4dadb9923bb9b8628843587a43e1c:/system.v?ds=sidebyside diff --git a/system.v b/system.v index fdefc54..ddbe0b7 100644 --- a/system.v +++ b/system.v @@ -56,12 +56,25 @@ module System(input clk); wire [3:0] execute_out_write_num; wire [31:0] execute_out_write_data; wire [31:0] execute_out_op0, execute_out_op1, execute_out_op2; + wire [31:0] execute_out_cpsr, execute_out_spsr; wire [31:0] jmppc; wire jmp; wire memory_out_write_reg; wire [3:0] memory_out_write_num; wire [31:0] memory_out_write_data; + + wire cp_ack_terminal; + wire cp_busy_terminal; + wire [31:0] cp_read_terminal; + + wire cp_req; + wire [31:0] cp_insn; + wire cp_ack = cp_ack_terminal; + wire cp_busy = cp_busy_terminal; + wire cp_rnw; + wire [31:0] cp_read = cp_read_terminal; + wire [31:0] cp_write; wire stall_cause_issue; wire stall_cause_execute; @@ -151,9 +164,11 @@ module System(input clk); .write_data(execute_out_write_data), .jmp(jmp), .jmppc(jmppc), .outpc(pc_out_execute), .outinsn(insn_out_execute), - .outop0(execute_out_op0), .outop1(execute_out_op1), .outop2(execute_out_op2)); + .outop0(execute_out_op0), .outop1(execute_out_op1), .outop2(execute_out_op2), + .outcpsr(execute_out_cpsr), .outspsr(execute_out_spsr)); assign execute_out_backflush = jmp; + assign cp_insn = insn_out_execute; Memory memory( .clk(clk), .Nrst(1'b0), /* stall? flush? */ @@ -162,11 +177,18 @@ module System(input clk); .st_read(regfile_read_3), .st_data(regfile_rdata_3), .inbubble(bubble_out_execute), .pc(pc_out_execute), .insn(insn_out_execute), .op0(execute_out_op0), .op1(execute_out_op1), .op2(execute_out_op2), + .spsr(execute_out_spsr), .cpsr(execute_out_cpsr), .write_reg(execute_out_write_reg), .write_num(execute_out_write_num), .write_data(execute_out_write_data), .outstall(stall_cause_memory), .outbubble(bubble_out_memory), .outpc(pc_out_memory), .outinsn(insn_out_memory), .out_write_reg(memory_out_write_reg), .out_write_num(memory_out_write_num), - .out_write_data(memory_out_write_data)); + .out_write_data(memory_out_write_data), + .cp_req(cp_req), .cp_ack(cp_ack), .cp_busy(cp_busy), .cp_rnw(cp_rnw), .cp_read(cp_read), .cp_write(cp_write)); + + Terminal terminal( + .clk(clk), + .cp_req(cp_req), .cp_insn(cp_insn), .cp_ack(cp_ack_terminal), .cp_busy(cp_busy_terminal), .cp_rnw(cp_rnw), + .cp_read(cp_read_terminal), .cp_write(cp_write)); reg [31:0] clockno = 0; always @(posedge clk)