X-Git-Url: http://git.joshuawise.com/firearm.git/blobdiff_plain/eacc5bf1a2c6cf0e72dfe45fd8526ec762a15f41..55c6199c2c85349b6ff16144ec9cbd770b0ee5f6:/BlockRAM.v

diff --git a/BlockRAM.v b/BlockRAM.v
index 1731c30..091c749 100644
--- a/BlockRAM.v
+++ b/BlockRAM.v
@@ -12,12 +12,10 @@ module BlockRAM(
 	 * 0x00004000.  rdata and ready must be driven to zero if the
 	 * address is not within the range of this module.
 	 */
-	wire decode = (bus_addr & ~32'h00003FFF) == 32'h00000000;
-	/* verilator lint_off WIDTH */
-	wire [13:0] ramaddr = bus_addr & 32'h3FFC;	/* mask off lower two bits
+	wire decode = bus_addr[31:14] == 18'b0;
+	wire [13:0] ramaddr = {bus_addr[13:2], 2'b0};	/* mask off lower two bits
 							 * for word alignment */
-	/* verilator lint_on WIDTH */
-	
+
 	reg [31:0] data [(16384 / 4 - 1):0];
 	
 	reg [31:0] temprdata = 0;
@@ -37,7 +35,7 @@ module BlockRAM(
 		
 		/* This is not allowed to be conditional -- stupid Xilinx
 		 * blockram. */
-		temprdata <= data[ramaddr[13:2]];
+		temprdata <= (bus_wr && decode) ? bus_wdata : data[ramaddr[13:2]];
 		lastread <= ramaddr;
 	end
 endmodule