X-Git-Url: http://git.joshuawise.com/firearm.git/blobdiff_plain/e08b748aff686b30f05624c71148ba96893ea56e..979f2bd7aca637e8e546ec2675bef82c353b9aea:/Memory.v

diff --git a/Memory.v b/Memory.v
index 3f82a54..04220ca 100644
--- a/Memory.v
+++ b/Memory.v
@@ -16,6 +16,11 @@ module Memory(
 	output reg [3:0] st_read,
 	input [31:0] st_data,
 	
+	/* Coprocessor interface */
+	output reg cp_req,
+	input cp_ack,
+	input cp_busy,
+	
 	/* stage inputs */
 	input inbubble,
 	input [31:0] pc,
@@ -42,6 +47,7 @@ module Memory(
 	reg next_writeback, next_notdone, next_inc_next;
 	reg [31:0] align_s1, align_s2, align_rddata;
 
+	wire next_outbubble;	
 	wire next_write_reg;
 	wire [3:0] next_write_num;
 	wire [31:0] next_write_data;
@@ -56,10 +62,10 @@ module Memory(
 	begin
 		outpc <= pc;
 		outinsn <= insn;
-		outbubble <= rw_wait;
-		out_write_reg <= next_writeback;
-		out_write_num <= next_regsel;
-		out_write_data <= next_regdata;
+		outbubble <= next_outbubble;
+		out_write_reg <= next_write_reg;
+		out_write_num <= next_write_num;
+		out_write_data <= next_write_data;
 		notdone <= next_notdone;
 		inc_next <= next_inc_next;
 		regs <= next_regs;
@@ -81,14 +87,17 @@ module Memory(
 		next_write_num = write_num;
 		next_write_data = write_data;
 		next_inc_next = 1'b0;
+		next_outbubble = inbubble;
 		outstall = 1'b0;
 		next_regs = 16'b0;
 		next_started = started;
+		cp_req = 1'b0;
 
 		casez(insn)
 		`DECODE_LDRSTR_UNDEFINED: begin end
 		`DECODE_LDRSTR: begin
 			if (!inbubble) begin
+				next_outbubble = rw_wait;
 				outstall = rw_wait | notdone;
 			
 				addr = insn[23] ? op0 + op1 : op0 - op1; /* up/down select */