X-Git-Url: http://git.joshuawise.com/firearm.git/blobdiff_plain/dfe0713aebc58dd093c309011ac0596597ab2cb5..03bbc40b28ecb9fab7f459f627d3843ba3f10b16:/system.v?ds=inline diff --git a/system.v b/system.v index d7fc62c..1635a34 100644 --- a/system.v +++ b/system.v @@ -1,5 +1,5 @@ -`define BUS_ICACHE 0 -`define BUS_DCACHE 1 +`define BUS_ICACHE 1 +`define BUS_DCACHE 0 module System(input clk); wire [7:0] bus_req; @@ -12,7 +12,7 @@ module System(input clk); wire bus_req_icache; wire bus_req_dcache; - assign bus_req = {6'b0, bus_req_dcache, bus_req_icache}; + assign bus_req = {6'b0, bus_req_icache, bus_req_dcache}; wire bus_ack_icache = bus_ack[`BUS_ICACHE]; wire bus_ack_dcache = bus_ack[`BUS_DCACHE]; @@ -151,13 +151,14 @@ module System(input clk); RegFile regfile( .clk(clk), - .read_0(regfile_read_0), .read_1(regfile_read_1), .read_2(regfile_read_2), .read_2(regfile_read_3), - .rdata_0(regfile_rdata_0), .rdata_1(regfile_rdata_1), .rdata_2(regfile_rdata_2), .rdata_2(regfile_rdata_3), + .read_0(regfile_read_0), .read_1(regfile_read_1), .read_2(regfile_read_2), .read_3(regfile_read_3), + .rdata_0(regfile_rdata_0), .rdata_1(regfile_rdata_1), .rdata_2(regfile_rdata_2), .rdata_3(regfile_rdata_3), .spsr(regfile_spsr), .write(regfile_write), .write_reg(regfile_write_reg), .write_data(regfile_write_data)); Decode decode( .clk(clk), + .stall(stall_cause_execute), .insn(insn_out_fetch), .inpc(pc_out_fetch), .incpsr(writeback_out_cpsr), .inspsr(writeback_out_spsr), .op0(decode_out_op0), .op1(decode_out_op1), .op2(decode_out_op2), .carry(decode_out_carry), .outcpsr(decode_out_cpsr), .outspsr(decode_out_spsr), @@ -195,7 +196,7 @@ module System(input clk); .out_write_reg(memory_out_write_reg), .out_write_num(memory_out_write_num), .out_write_data(memory_out_write_data), .cp_req(cp_req), .cp_ack(cp_ack), .cp_busy(cp_busy), .cp_rnw(cp_rnw), .cp_read(cp_read), .cp_write(cp_write), - .outcpsr(memory_out_cpsr), .outspsr(memory_out_spsr)); + .outcpsr(memory_out_cpsr), .outspsr(memory_out_spsr) /* XXX data_size */); Terminal terminal( .clk(clk), @@ -219,8 +220,8 @@ module System(input clk); $display("------------------------------------------------------------------------------"); $display("%3d: FETCH: Bubble: %d, Instruction: %08x, PC: %08x", clockno, bubble_out_fetch, insn_out_fetch, pc_out_fetch); $display("%3d: ISSUE: Stall: %d, Bubble: %d, Instruction: %08x, PC: %08x", clockno, stall_cause_issue, bubble_out_issue, insn_out_issue, pc_out_issue); - $display("%3d: DECODE: op1 %08x, op2 %08x, op3 %08x, carry %d", clockno, decode_out_op0, decode_out_op1, decode_out_op2, decode_out_carry); - $display("%3d: EXEC: Stall: %d, Bubble: %d, Instruction: %08x, PC: %08x, Reg: %d, [%08x -> %d], Jmp: %d [%08x]", clockno, stall_cause_execute, bubble_out_execute, insn_out_execute, pc_out_execute, execute_out_write_reg, execute_out_write_data, execute_out_write_num, jmp, jmppc); + $display("%3d: DECODE: op0 %08x, op1 %08x, op2 %08x, carry %d", clockno, decode_out_op0, decode_out_op1, decode_out_op2, decode_out_carry); + $display("%3d: EXEC: Stall: %d, Bubble: %d, Instruction: %08x, PC: %08x, Reg: %d, [%08x -> %d], Jmp: %d [%08x]", clockno, stall_cause_execute, bubble_out_execute, insn_out_execute, pc_out_execute, execute_out_write_reg, execute_out_write_data, execute_out_write_num, jmp_out_execute, jmppc_out_execute); $display("%3d: MEMORY: Stall: %d, Bubble: %d, Instruction: %08x, PC: %08x, Reg: %d, [%08x -> %d]", clockno, stall_cause_memory, bubble_out_memory, insn_out_memory, pc_out_memory, memory_out_write_reg, memory_out_write_data, memory_out_write_num); $display("%3d: WRITEB: CPSR %08x, SPSR %08x, Reg: %d [%08x -> %d], Jmp: %d [%08x]", clockno, writeback_out_cpsr, writeback_out_spsr, regfile_write, regfile_write_data, regfile_write_reg, jmp_out_writeback, jmppc_out_writeback); end